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STD12N06L View Datasheet(PDF) - STMicroelectronics

Part NameSTD12N06L ST-Microelectronics
STMicroelectronics ST-Microelectronics
DescriptionN - CHANNEL ENHANCEMENT MODE LOW THRESHOLD POWER MOS TRANSISTOR
'STD12N06L' PDF : 10 Pages
1 2 3 4 5 6 7 8 9 10
STD12N05L
STD12N06L
N - CHANNEL ENHANCEMENT MODE
LOW THRESHOLD POWER MOS TRANSISTOR
TYPE
STD12N05L
STD12N06L
VDSS
50 V
60 V
R DS( on)
< 0.15
< 0.15
ID
12 A
12 A
s TYPICAL RDS(on) = 0.115
s AVALANCHE RUGGED TECHNOLOGY
s 100% AVALANCHE TESTED
s REPETITIVE AVALANCHE DATA AT 100oC
s LOW GATE CHARGE
s LOGIC LEVEL COMPATIBLE INPUT
s 175oC OPERATING TEMPERATURE
s APPLICATION ORIENTED
CHARACTERIZATION
s THROUGH-HOLE IPAK (TO-251) POWER
PACKAGE IN TUBE (SUFFIX ”-1”)
s SURFACE-MOUNTING DPAK (TO-252)
POWER PACKAGE IN TAPE & REEL
(SUFFIX ”T4”)
APPLICATIONS
s HIGH CURRENT, HIGH SPEED SWITCHING
s SOLENOID AND RELAY DRIVERS
s REGULATORS
s DC-DC & DC-AC CONVERTERS
s MOTOR CONTROL, AUDIO AMPLIFIERS
s AUTOMOTIVE ENVIRONMENT (INJECTION,
ABS, AIR-BAG, LAMPDRIVERS, Etc.)
ABSOLUTE MAXIMUM RATINGS
Symbol
P ar amete r
VD S Drain-source Voltage (VGS = 0)
VDG R Drain- gate Voltage (RGS = 20 k)
VGS Gate-source Voltage
ID
Drain Current (continuous) at T c = 25 oC
ID
Drain Current (continuous) at T c = 100 oC
IDM() Drain Current (pulsed)
Ptot Total Dissipation at Tc = 25 oC
Derating Factor
Tstg Storage Temperature
Tj Max. Operating Junction Temperature
() Pulse width limited by safe operating area
November 1996
3
2
1
IPAK
TO-251
(Suffix ”-1”)
3
1
DPAK
TO-252
(Suffix ”T4”)
INTERNAL SCHEMATIC DIAGRAM
Val ue
STD12N05L
S T D 12 N0 6L
50
60
50
60
± 15
12
8
48
45
0. 3
-65 to 175
175
Unit
V
V
V
A
A
A
W
W/oC
oC
oC
1/10
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