General Description
Each of these data selectors/multiplexers contains inverters and drivers to supply fully complementary, on-chip, binary decoding data selection to the AND-OR-invert gates. Separate strobe inputs are provided for each of the two four-line sections.

Features
■ Permits multiplexing from N lines to 1 line
■ Performs parallel-to-serial conversion
■ Strobe (enable) line provided for cascading (N lines to n lines)
■ High fan-out, low-impedance, totem-pole outputs
■ Typical average propagation delay times
    From data 6 ns
    From strobe 9.5 ns
    From select 12 ns
■ Typical power dissipation 225 mW