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Part Name(s) : LPC1751 LPC1752 LPC1754 LPC1756 LPC1758 LPC1759 LPC1759FBD80 LPC1758FBD80 LPC1756FBD80 LPC1754FBD80 LPC1752FBD80 LPC1751FBD80 Philips
Philips Electronics
Description : 32-bit ARM Cortex-M3 MCU; up to 512 kB flash and 64 kB SRAM with Ethernet, USB 2.0 Host/Device/OTG, CAN

General description
The LPC1759/58/56/54/52/51 are ARM Cortex-M3 based microcontrollers for embedded applications featuring a high level of integration and low power consumption. The ARM Cortex-M3 is a next generation core that offers system enhancements such as enhanced debug features and a higher level of support block integration.
The LPC1758/56/57/54/52/51 operate at CPU frequencies of up to 100 MHz. The LPC1759 operates at CPU frequencies of up to 120 MHz. The ARM Cortex-M3 CPU incorporates a 3-stage pipeline and uses a Harvard architecture with separate local instruction and data buses as well as a third bus for peripherals. The ARM Cortex-M3 CPU also includes an internal prefetch unit that supports speculative branching.
The peripheral complement of the LPC1759/58/56/54/52/51 includes up to 512 kB of flash memory, up to 64 kB of data memory, Ethernet MAC, USB Device/Host/OTG interface, 8-channel general purpose DMA controller, 4 UARTs, 2 CAN channels, 2 SSP controllers, SPI interface, 2 I2C-bus interfaces, 2-input plus 2-output I2S-bus interface, 6 channel 12-bit ADC, 10-bit DAC, motor control PWM, Quadrature Encoder interface, 4 general purpose timers, 6-output general purpose PWM, ultra-low power Real-Time Clock (RTC) with separate battery supply, and up to 52 general purpose I/O pins.

Features
■ ARM Cortex-M3 processor, running at frequencies of up to 100 MHz (LPC1758/56/57/54/52/51) or of up to 120 MHz (LPC1759). A Memory Protection Unit (MPU) supporting eight regions is included.
■ ARM Cortex-M3 built-in Nested Vectored Interrupt Controller (NVIC).
■ Up to 512 kB on-chip flash programming memory. Enhanced flash memory accelerator enables high-speed 120 MHz operation with zero wait states.
■ In-System Programming (ISP) and In-Application Programming (IAP) via on-chip bootloader software.
■ On-chip SRAM includes:
   ♦ Up to 32 kB of SRAM on the CPU with local code/data bus for high-performance CPU access.
   ♦ Two/one 16 kB SRAM blocks with separate access paths for higher throughput.
      These SRAM blocks may be used for Ethernet (LPC1758 only), USB, and DMA memory, as well as for general purpose CPU instruction and data storage.
■ Eight channel General Purpose DMA controller (GPDMA) on the AHB multilayer matrix that can be used with the SSP, I2S-bus, UART, the Analog-to-Digital and Digital-to-Analog converter peripherals, timer match signals, and for memory-to-memory transfers.
■ Multilayer AHB matrix interconnect provides a separate bus for each AHB master.
   AHB masters include the CPU, General Purpose DMA controller, Ethernet MAC (LPC1758 only), and the USB interface. This interconnect provides communication with no arbitration delays.
■ Split APB bus allows high throughput with few stalls between the CPU and DMA.
■ Serial interfaces:
   ♦ On the LPC1758 only, Ethernet MAC with RMII interface and dedicated DMA controller.
   ♦ USB 2.0 full-speed device/Host/OTG controller with dedicated DMA controller and on-chip PHY for device, Host, and OTG functions. The LPC1752/51 include a USB device controller only.
   ♦ Four UARTs with fractional baud rate generation, internal FIFO, and DMA support. One UART has modem control I/O and RS-485/EIA-485 support, and one UART has IrDA support.
   ♦ CAN 2.0B controller with two (LPC1759/58/56) or one (LPC1754/52/51) channels.
   ♦ SPI controller with synchronous, serial, full duplex communication and programmable data length.
   ♦ Two SSP controllers with FIFO and multi-protocol capabilities. The SSP interfaces can be used with the GPDMA controller.
   ♦ Two I2C-bus interfaces supporting fast mode with a data rate of 400 kbit/s with multiple address recognition and monitor mode.
   ♦ On the LPC1759/58/56 only, I2S (Inter-IC Sound) interface for digital audio input or output, with fractional rate control. The I2S-bus interface can be used with the GPDMA. The I2S-bus interface supports 3-wire and 4-wire data transmit and receive as well as master clock input/output.
■ Other peripherals:
   ♦ 52 General Purpose I/O (GPIO) pins with configurable pull-up/down resistors. All GPIOs support a new, configurable open-drain operating mode. The GPIO block is accessed through the AHB multilayer bus for fast access and located in memory such that it supports Cortex-M3 bit banding and use by the General Purpose DMA Controller.
   ♦ 12-bit Analog-to-Digital Converter (ADC) with input multiplexing among six pins, conversion rates up to 200 kHz, and multiple result registers. The 12-bit ADC can be used with the GPDMA controller.
   ♦ On the LPC1759/58/56/54 only, 10-bit Digital-to-Analog Converter (DAC) with dedicated conversion timer and DMA support.
   ♦ Four general purpose timers/counters, with a total of three capture inputs and ten compare outputs. Each timer block has an external count input. Specific timer events can be selected to generate DMA requests.
   ♦ One motor control PWM with support for three-phase motor control.
   ♦ Quadrature encoder interface that can monitor one external quadrature encoder.
   ♦ One standard PWM/timer block with external count input.
   ♦ Real-Time Clock (RTC) with a separate power domain and dedicated RTC oscillator. The RTC block includes 20 bytes of battery-powered backup registers.
   ♦ Watchdog Timer (WDT). The WDT can be clocked from the internal RC oscillator, the RTC oscillator, or the APB clock.
   ♦ ARM Cortex-M3 system tick timer, including an external clock input option.
   ♦ Repetitive Interrupt Timer (RIT) provides programmable and repeating timed interrupts.
   ♦ Each peripheral has its own clock divider for further power savings.
■ Standard JTAG test/debug interface for compatibility with existing tools. Serial Wire Debug and Serial Wire Trace Port options.
■ Emulation trace module enables non-intrusive, high-speed real-time tracing of instruction execution.
■ Integrated PMU (Power Management Unit) automatically adjusts internal regulators to minimize power consumption during Sleep, Deep sleep, Power-down, and Deep power-down modes.
■ Four reduced power modes: Sleep, Deep-sleep, Power-down, and Deep power-down.
■ Single 3.3 V power supply (2.4 V to 3.6 V).
■ One external interrupt input configurable as edge/level sensitive. All pins on Port 0 and Port 2 can be used as edge sensitive interrupt sources.
■ Non-maskable Interrupt (NMI) input.
■ The Wakeup Interrupt Controller (WIC) allows the CPU to automatically wake up from any priority interrupt that can occur while the clocks are stopped in Deep sleep, Power-down, and Deep power-down modes.
■ Processor wake-up from Power-down mode via any interrupt able to operate during Power-down mode (includes external interrupts, RTC interrupt, USB activity, Ethernet wake-up interrupt (LPC1758 only), CAN bus activity, Port 0/2 pin interrupt, and NMI).
■ Brownout detect with separate threshold for interrupt and forced reset.
■ Power-On Reset (POR).
■ Crystal oscillator with an operating range of 1 MHz to 25 MHz.
■ 4 MHz internal RC oscillator trimmed to 1 % accuracy that can optionally be used as a system clock.
■ PLL allows CPU operation up to the maximum CPU rate without the need for a high-frequency crystal. May be run from the main oscillator, the internal RC oscillator, or the RTC oscillator.
■ USB PLL for added flexibility.
■ Code Read Protection (CRP) with different security levels.
■ Unique device serial number for identification purposes.
■ Available as 80-pin LQFP package (12 mm × 12 mm × 1.4 mm).

Applications
■ eMetering
■ Lighting
■ Industrial networking
■ Alarm systems
■ White goods
■ Motor control

 

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Part Name(s) : SAMA5D3 SAMA5D31 SAMA5D33 SAMA5D34 SAMA5D35 ATSAMA5D31A-CU ATSAMA5D33A-CU ATSAMA5D34A-CU ATSAMA5D35A-CU ATSAMA5D31A-CFU ATSAMA5D31A-CFUR ATSAMA5D31A-CU ATSAMA5D31A-CUR ATSAMA5D33A-CU ATSAMA5D33A-CUR ATSAMA5D34A-CU ATSAMA5D34A-CUR ATSAMA5D35A-CN ATSAMA5D35A-CNR ATSAMA5D35A-CU ATSAMA5D35A-CUR ATSAMA5D36A-CN ATSAMA5D36A-CNR ATSAMA5D36A-CU ATSAMA5D36A-CUR Atmel
Atmel Corporation
Description : SMART ARM-based MPU

Description
The Atmel SAMA5D3 series is a high-performance, power-efficient embedded MPU based on the ARM® Cortex™-A5 processor, achieving 536 MHz with power consumption levels below 0.5 mW in low-power mode. The device features a floating point unit for high-precision computing and accelerated data processing, and a high data bandwidth architecture. It integrates advanced user interface and connectivity peripherals and security features.
The SAMA5D3 series features an internal multi-layer bus architecture associated with 39 DMA channels to sustain the high bandwidth required by the processor and the high-speed peripherals. The device offers support for DDR2/LPDDR/LPDDR2 and MLC NAND Flash memory with 24-bit ECC.
Features
● Core
   ● ARM® Cortex™-A5 Processor with ARM v7-A Thumb2® Instruction Set
      ● CPU Frequency up to 536 MHz
   ● 32 Kbyte Data Cache, 32 Kbyte Instruction Cache, Virtual Memory System
      Architecture (VMSA)
   ● Fully Integrated MMU and Floating Point Unit (VFPv4)
● Memories
   ● One 160 Kbyte Internal ROM Single-cycle Access at System Speed,
      Embedded Boot Loader: Boot on
      NAND Flash, SDCard, eMMC, serial DataFlash®, selectable Order
   ● One 128 Kbyte Internal SRAM, Single-cycle Access at System Speed
   ● High Bandwidth 32-bit Multi-port Dynamic Ram Controller supporting 512 Mbyte 8 bank
      DDR2/LPDDR/LPDDR2
   ● Independent Static Memory Controller with SLC/MLC NAND Support with up to
      24-bit Error Correcting Code  (PMECC)
● System running up to 166 MHz
   ● Power-on Reset Cells, Reset Controller, Shut Down Controller, Periodic Interval Timer,
      Watchdog Timer and  Real Time Clock
   ● Boot Mode Select Option, Remap Command
   ● Internal Low-power 32 kHz RC Oscillator and Fast 12 MHz RC Oscillators
   ● Selectable 32768 Hz Low-power Oscillator and 12 MHz Oscillator
   ● One 400 to 1000 MHz PLL for the System and one PLL at 480 MHz optimized for USB High
      Speed
   ● 39 DMA Channels including two 8-channel 64-bit Central DMA Controllers
   ● 64-bit Advanced Interrupt Controller
   ● Three Programmable External Clock Signals
   ● Programmable Fuse Box with 256 fuse bits, 192 of them available for Customer
● Low Power Management
   ● Shut Down Controller
   ● Battery Backup Registers
   ● Clock Generator and Power Management Controller
   ● Very Slow Clock Operating Mode, Software Programmable Power Optimization Capabilities
● Peripherals
   ● LCD TFT Controller with Overlay, Alpha-blending, Rotation, Scaling and Color Space
      Conversion
   ● ITU-R BT. 601/656 Image Sensor Interface
   ● Three HS/FS/LS USB Ports with On-Chip Transceivers
      ● One Device Controller
      ● One Host Controller with Integrated Root Hub (3 Downstream Ports)
   ● One 10/100/1000 Mbps Gigabit Ethernet Mac Controller (GMAC) with IEEE1588 support
   ● One 10/100 Mbps Ethernet Mac Controller (EMAC)
   ● Two CAN Controllers with 8 Mailboxes, fully Compliant with CAN 2.0 Part A and 2.0 Part B
   ● Softmodem Interface
   ● Three High Speed Memory Card Hosts (eMMC 4.3 and SD 2.0)
   ● Two Master/Slave Serial Peripheral Interface
   ● Two Synchronous Serial Controllers
   ● Three Two-wire Interface up to 400 Kbits supporting I2C Protocol and SMBUS
   ● Four USARTs, two UARTs, one DBGU
   ● Two Three-channel 32-bit Timer/Counters
   ● One Four-channel 16-bit PWM Controller
   ● One 12-channel 12-bit Analog-to-Digital Converter with Resistive Touch-Screen function
   ● Write Protected Registers (Continue ...)

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Part Name(s) : LPC1751FBD80 LPC1751FBD80,551 LPC1752FBD80 LPC1752FBD80,551 LPC1754FBD80 LPC1754FBD80,551 LPC1756FBD80 LPC1756FBD80/CP327 LPC1758FBD80 LPC1758FBD80Y LPC1759FBD80 LPC1759FBD80,551 LPC175X NXP
NXP Semiconductors.
Description : 32-bit ARM Cortex-M3 MCU; up to 512 kB flash and 64 kB SRAM with Ethernet, USB 2.0 Host/Device/OTG, CAN

General description
The LPC1759/58/56/54/52/51 are ARM Cortex-M3 based microcontrollers for embedded applications featuring a high level of integration and low power consumption. The ARM Cortex-M3 is a next generation core that offers system enhancements such as enhanced debug features and a higher level of support block integration.
The LPC1758/56/57/54/52/51 operate at CPU frequencies of up to 100 MHz. The LPC1759 operates at CPU frequencies of up to 120 MHz. The ARM Cortex-M3 CPU incorporates a 3-stage pipeline and uses a Harvard architecture with separate local instruction and data buses as well as a third bus for peripherals. The ARM Cortex-M3 CPU also includes an internal prefetch unit that supports speculative branching.

Features and benefits
■ ARM Cortex-M3 processor, running at frequencies of up to 100 MHz
   (LPC1758/56/57/54/52/51) or of up to 120 MHz (LPC1759). A Memory Protection Unit
   (MPU) supporting eight regions is included.
■ ARM Cortex-M3 built-in Nested Vectored Interrupt Controller (NVIC).
■ Up to 512 kB on-chip flash programming memory. Enhanced flash memory accelerator enables high-speed 120 MHz operation with zero wait states.
■In-System Programming (ISP) and In-Application Programming (IAP) via on-chip bootloader software.
■ On-chip SRAM includes:
♦ Up to 32 kB of SRAM on the CPU with local code/data bus for high-performance CPU access.
♦ Two/one 16 kB SRAM blocks with separate access paths for higher throughput.
■ These SRAM blocks may be used for Ethernet (LPC1758 only), USB, and DMA memory, as well as for general purpose CPU instruction and data storage.
 
■ Eight channel General Purpose DMA controller (GPDMA) on the AHB multilayer matrix that can be used with the SSP, I2S-bus, UART, the Analog-to-Digital and Digital-to-Analog converter peripherals, timer match signals, and for memory-to-memory transfers.
■ Multilayer AHB matrix interconnect provides a separate bus for each AHB master. AHB masters include the CPU, General Purpose DMA controller, Ethernet MAC (LPC1758 only), and the USB interface. This interconnect provides communication with no arbitration delays.
■ Split APB bus allows high throughput with few stalls between the CPU and DMA.
■ Serial interfaces:
 ♦ On the LPC1758 only, Ethernet MAC with RMII interface and dedicated DMA controller.
 ♦ USB 2.0 full-speed device/Host/OTG controller with dedicated DMA controller and on-chip PHY for device, Host, and OTG functions. The LPC1752/51 include a USB device controller only.
 ♦ Four UARTs with fractional baud rate generation, internal FIFO, and DMA support. One UART has modem control I/O and RS-485/EIA-485 support, and one UART has IrDA support.
 ♦ CAN 2.0B controller with two (LPC1759/58/56) or one (LPC1754/52/51) channels.
 ♦ SPI controller with synchronous, serial, full duplex communication and programmable data length.
 ♦ Two SSP controllers with FIFO and multi-protocol capabilities. The SSP interfaces can be used with the GPDMA controller.
 ♦ Two I2C-bus interfaces supporting fast mode with a data rate of 400 kbit/s with multiple address recognition and monitor mode.
 ♦ On the LPC1759/58/56 only, I2S (Inter-IC Sound) interface for digital audio input or output, with fractional rate control. The I2S-bus interface can be used with the GPDMA. The I2S-bus interface supports 3-wire and 4-wire data transmit and receive as well as master clock input/output.
■ Other peripherals:
 ♦ 52 General Purpose I/O (GPIO) pins with configurable pull-up/down resistors. All GPIOs support a new, configurable open-drain operating mode. The GPIO block is accessed through the AHB multilayer bus for fast access and located in memory such that it supports Cortex-M3 bit banding and use by the General Purpose DMA Controller.
 ♦ 12-bit Analog-to-Digital Converter (ADC) with input multiplexing among six pins, conversion rates up to 200 kHz, and multiple result registers. The 12-bit ADC can be used with the GPDMA controller.
 ♦ On the LPC1759/58/56/54 only, 10-bit Digital-to-Analog Converter (DAC) with dedicated conversion timer and DMA support.
 Four general purpose timers/counters, with a total of three capture inputs and ten compare outputs. Each timer block has an external count input. Specific timer events can be selected to generate DMA requests.
 ♦ One motor control PWM with support for three-phase motor control.
 ♦ Quadrature encoder interface that can monitor one external quadrature encoder.
 ♦ One standard PWM/timer block with external count input.
 ♦ Real-Time Clock (RTC) with a separate power domain and dedicated RTC oscillator. The RTC block includes 20 bytes of battery-powered backup registers.
 ♦ WatchDog Timer (WDT). The WDT can be clocked from the internal RC oscillator, the RTC oscillator, or the APB clock.
 ♦ ARM Cortex-M3 system tick timer, including an external clock input option.
 ♦ Repetitive Interrupt Timer (RIT) provides programmable and repeating timed interrupts.
    ♦ Each peripheral has its own clock divider for further power savings.

 

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Part Name(s) : KB3930 ETC
Unspecified
Description : Keyboard Controller

[ene technology Inc.]

General Description
Overview
The ENE KB3930 is a highly customized embedded controller (EC) for notebook platforms. The embedded controller contains industrial standard 8051 microprocessor and provides function of i8042 keyboard controller basically. KB3930 is embedded LPC interface used to communicate with Host. KB3930 is designed with Shared-ROM architecture. The EC firmware and system BIOS will co-exist in single SPI flash. The embedded controller also features rich interfaces for general applications, such as PS/2 interface, Keyboard matrix encoder, PWM controller, A/D converter, D/A converter, Fan controller, SMBus controller, GPIO controller, PECI controller, one wire master, SPI controller, voltage comparator and extended interface (ENE Serial Bus) for more applications, like capacitive touch button application and GPIO extender.

Features
LPC Low Pin Count Interface 
SIRQ supporting IRQ1, IRQ12, SCI or SMI# interrupt and one programmab IRQ provided.
I/O Address Decoding:
  ƒLegacy KBC I/O port 60h/64h
  ƒProgrammable EC I/O port, 62h/66h(recommend)
  ƒI/O port 68h/6Ch (sideband)
 ƒ 2 Programmable 4-byte Index-I/O ports to access internal EC registers.
ƒ  1 Programmable extended (debug) port I/O.
Memory Decoding:
  ƒFirmware Hub decode
  ƒLPC memory decode
Compatible with LPC specification v1.1
Support LPC interface re-direction to IKB for debugging

X-bus Bus Interface (XBI) : Flash Interface
 SPI flash is supported, size up to 4MB.
 SPI frequency supports 33/45/66MHz.
 New SPI command (dual read) to enhance the performance.
 The 64KB code memory can be mapped into system memory by one 16KB and one 48KB programmable pages independently.
 Support SPI flash in-system-programming via IKB pins.
 Enhanced pre-fetch mechanism. 

8051 Microprocessor 
 Compatible with industrial 8051 instructions with 3 cycles. 
 8051 runs at 8/16/22 MHz, programmable.
 256 bytes internal RAM and 4KB tight-coupled SRAM.
 24 extended interrupt sources.
 Two 16-bit timers.
 Full duplex UART integrated.
 Supports idle and stop mode.
 Enhanced ENE debug interface.
 Support Tx/Rx re-direction to IKB for debugging

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Part Name(s) : RT9259 RT9259GA RT9259GQV RT9259GS RT9259PA RT9259PQV RT9259PS Richtek
Richtek Technology
Description : 12V Synchronous Buck PWM DC-DC and Linear Power Controller

General Description
The RT9259 is a dual-channel DC/DC controller specifically designed to deliver high quality power where 12V power source is available. This part consists of a synchronous buck controller and an LDO controller. The synchronous buck controller integrates MOSFET drivers that support 12V+12V bootstrapped voltage for high efficiency power conversion. The bootstrap diode is built-in to simplify the circuit design and minimize external part count. The LDO controller drives an external N-MOSFET for lower power requirement.

Features
Single 12V Bias Supply
Support Dual Channel Power Conversion
  One Synchronous Rectified Buck PWM Controller
  One Linear Controller
Both Controllers Drive Low Cost N-MOSFETs
Adjustable Frequency from 150kHz to 1MHz and Free-Run Frequency at 230kHz
Small External Component Count
Output Voltage Regulation
  PWM Controller : ±1% Accuracy
  LDO Controller : ±2% Accuracy
Two Internal VREFPower Support Lower to 0.8V
Adjustable External Compensation
Linear Controller Drives N-MOSFET Pass Transistor
Fully-Adjustable Outputs
Under Voltage Protection for Both Outputs
Over Current Fault Monitor on MOSFET; No Current Sense Resistor is Required.
RoHS Compliant and 100% Lead (Pb)-Free

Applications
Graphic Card GPU, Memory Core Power
Graphic Card Interface Power
Motherboard, Desktop and Servers Chipset and Memory  Core Power
IA Equipments
Telecomm Equipments
High Power DC-DC Regulators

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Part Name(s) : VT82C596 VT82C596B ETC
Unspecified
Description : PCI INTEGRATED PERIPHERAL CONTROLLER

[VIA Technologies, Inc.]

PC98 COMPLIANT PCI-TO-ISA BRIDGE WITH ACPI, ENHANCED POWER MANAGEMENT, SMBUS, APIC, DISTRIBUTED DMA, SERIAL IRQ, PLUG AND PLAY, ULTRADMA-33/66 MASTER MODE PCI-EIDE CONTROLLER, USB CONTROLLER, KEYBOARD CONTROLLER, AND RTC

• Inter-operable with VIA and other Host-to-PCI Bridges
   − Combine with VT82C598 (Apollo MVP3) for a complete 66 / 75 / 83 / 100MHz Socket-7 PCI / AGP / ISA system
   − Combine with VT82C693 (Apollo ProPlus) for a complete 66 / 100 MHz Socket-370 or Slot-1 PCI / ISA system
   − Combine with VT82C693A (Apollo Pro133) for a complete 66 / 100 / 133 MHz Skt-370 or Slot-1 PCI / ISA system
• PC98 Compliant PCI to ISA Bridge
   − Integrated ISA Bus Controller with integrated DMA, timer, and interrupt controller
   − Integrated Keyboard Controller with PS2 mouse support
   − Integrated DS12885-style Real Time Clock with extended 256 byte CMOS RAM and Day/Month Alarm for ACPI
   − Integrated USB Controller with root hub and two function ports
   − Integrated UltraDMA-33/66 master mode EIDE controller with enhanced PCI bus commands
   − PCI-2.1 compliant with delay transaction
   − Eight double-word line buffer between PCI and ISA bus
   − One-level PCI to ISA post-write buffer
   − Supports type F DMA transfers
   − Distributed DMA support for ISA legacy DMA across the PCI bus
   − Sideband signal support for PC/PCI and serial interrupt for docking and non-docking applications
   − Serial Interrupt input
   − Fast reset and Gate A20 operation
   − Edge trigger or level-sensitive interrupts
   − Flash EPROM, 2Mb EPROM and combined BIOS support
   − Supports positive and subtractive decoding
• Universal Serial Bus Controller
   − USB v.1.1 and Intel Universal HCI v.1.1 compatible
   − Eighteen level (doublewords) data FIFO with full scatter / gather capabilities
   − Root hub and two function ports
   − Integrated physical layer transceivers with over-current detection status on USB inputs
   − Legacy keyboard and PS/2 mouse support
• Advanced Programmable Interrupt Controller (APIC)
   − Integrated on-chip
   − Control pins provided for support of optional external APIC
   − Used to extend system interrupt capability
   − PC98 compliant
   (Continue ...)

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Part Name(s) : MEC1310 MEC1310-NU MEC1310-NU-TR MEC1310I-NU MEC1310I-NU-TR Microchip
Microchip Technology
Description : Keyboard and Embedded Controller for Notebook PC

Description
The MEC1310 is a 128-pin 3.3V LPC-based ACPI 2.0 and PC99/PC2001 compliant Notebook I/O Controller. See FIGURE 1: MEC1310 Block Diagram on page 4. The MEC1310 incorporates a high-performance 8051-based keyboard and system controller with internal embedded 64K SRAM; a 1K byte Boot ROM, and 64-bytes battery backed registers. The embedded 64K SRAM is loaded via HOST/8051 SPI Memory Interface. The HOST/8051 SPI Memory Interface can be configured in Switched SPI Flash Configuration or Parallel Shared SPI Flash Configuration.
The MEC1310 has four PS/2 ports; an 16C550A-compatible 2 pin UART for Debug Port; three 8584-style I2C/SMBus controllers with two selectable ports per controller; a Serial IRQ peripheral agent interface; three ACPI Embedded Controller Interface; General Purpose I/O pins and seven General Purpose Outputs; four independently programmable pulse width modulators; dual fan control through the implementation of two fan tachometer input pins, RPM-PWM block with one tachometer input and one PWM output; hardware monitoring of a PWM input and maskable hardware wake up events; one BC-Link Combined High Speed/Low Speed Bus Master Controller; 5 channel Analog to Digital Converter.
The MEC1310 has two separate power planes to provide “instant on” and system power management functions. Additionally, the MEC1310 incorporates sophisticated power control circuitry (PCC). The PCC supports multiple low power down modes. Wake-up events and ACPI-related functions are supported through the SCI Interface.

Product Features
• 3.3V Operation with 5V Tolerant Buffers on PS/2 pins
• ACPI 1.0/2.0 PC99/PC2001 Compliant
• LPC Interface with Clock Run Support
   - Supports LPC Bus frequencies of 19.2MHz to 33MHz
   - Serial IRQ Interface Compatible with Serialized IRQ Support for PCI Systems
   - 15 Direct IRQs
   - ACPI SCI Interface
   - nSMI output and supporting PM registers
   - Shadowed write only registers
• Internal 64K SRAM in MEC1310
   - Loaded at VCC1 power from the HOST/8051 SPI Memory Interface
   - Provides 64KB of 8051 program space
   - 32k-Byte region shared with 8051data space
• HOST/8051 SPI Memory Interface
   - 3-pin Full Duplex serial communication interface.
   - One Chip Select Pins
   - Fully 8051 Controlled
   - Hardware Support for two SPI Flash Configu rations:
      – Switched SPI Flash Configuration
      – Parallel Shared SPI Flash Configuration
      – Debug Programming Interface
• Two Power Planes
   - Low Standby Current in Sleep Mode
• Three ACPI Embedded Controller Interface
• Configuration Register Set Compatible with ISA Plug-and-Play Standard (Version 1.0a)
• High-Performance Embedded 8051 Keyboard and System Controller
   - Provides System Power Management
   - System Watch Dog Timer (WDT)
   - 8042 Style Host Interface
   - Supports Interrupt and Polling Access
   - 1024 Boot /ROM
   - 256 Bytes Data RAM
   - On-Chip Memory-Mapped Control Registers
   - Access to VCC0 Backed Registers
   - Up to 18x8 Keyboard Scan Matrix
   - Two 16-Bit Timer/Counters
   - Integrated Full-Duplex Serial Port Interface
   - Seventy-Three 8051 Interrupt Sources
   - Thirty-Two 8-Bit, Host/8051 Mailbox Registers
   - Sixty-Four Maskable Hardware Wake-Up Events
   - Fast GATEA20
   - Fast CPU_RESET
   - Multiple Clock Sources and Operating Fre quencies
   - IDLE and SLEEP Modes
   - Trace FIFO Debug Port
• Accurate Fail-Safe Ring Oscillator
   - Single Clock source for most 8051 and SIO functions
   - Provides 2% frequency accuracy
   - Lock Bit provides status
   - 32.768KHz-input clock
   – Single ended input
   – Compatible with south bridge SUSCLK/ RSMRST# gating rules
   – replacement 32K distribution available when RSMRST# is asserted
   – Very low power state with only external 32K clock distributed
• Integrated Standby Power Reset Generator
   - VCC1_RST# open drain output
   - Accepts External driven Reset
• VCC0 Backed Resources
   - 64 Byte VCC0 Backed Registers
   - VCC0 Backed Status Register
• Three 8584-Style I2C/SMBus Controllers
   - 8051 Controlled Logic Allows I2C/SMBus Master or Slave Operation
   - I2C/SMBus Controllers are Fully Operational on Standby Power
   - Two Controllers with 2 Sets of Dedicated Pins per I2C/SMBus Controller
   - One Controller with one Set of Dedicated Pins per I2C/SMBus Controller
• Four independent Hardware Driven PS/2 Ports
   - GPIO signal function associated with each pin
• PECI Interface 2.0  (Continue....)

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Part Name(s) : APW7060 APW7060K APW7060KC-TR APW7060KC-TU Anpec
Anpec Electronics
Description : Dual Controllers - Step Down Synchronous PWM and Linear Controller

General Description
The APW7060 integrates a synchronous buck PWM controller and a linear controller to provide two regulated voltages in a single package. The PWM controller drives external N-channel MOSFETs and operates at a fixed 600kHz frequency.

Features
•Provides Two Regulated Voltages
- One Synchronous DC/DC Buck Controller
- One Linear Controller
•0.8V Internal Reference Voltage
- Both Controllers: 0.8V ± 2% Line, Load and Temp.
•Output Voltage Range
- PWM Controller : 0.8V to VIN
- Linear Controller : 0.8V to (12VCC-VGSpass)
•Full Duty Cycle Range for PWM Controller
- 0% to 100%
•Internal Loop Compensation for PWM Controller
•Internal 2ms Soft Start and Short Circuit Protection for both Controllers
•Both Controllers Drive N-Channel MOSFETs
•Small Converter Size
- 600kHz Constant Switching Frequency
- Simple SO-14 Package
•Shutdown Control

Applications
•Motherboard
•Graphics Cards
•12V, 5V and 3.3V Inputs DC-DC Converter
•DSP Supplies
•Embedded processor and I/O supplies

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Part Name(s) : ISP1562 ISP1562BE Philips
Philips Electronics
Description : Hi-Speed Universal Serial Bus PCI Host Controller

General description
The ISP1562 is a Peripheral Component Interconnect (PCI)-based, single-chip Universal Serial Bus (USB) Host Controller. It integrates two Original USB Open Host Controller Interface (OHCI) cores, one Hi-Speed USB Enhanced Host Controller Interface (EHCI) core, and two transceivers that are compliant with Hi-Speed USB and Original USB. The functional parts of the ISP1562 are fully compliant with Universal Serial Bus Specification Rev. 2.0, Open Host Controller Interface Specification for USB Rev. 1.0a, Enhanced Host Controller Interface Specification for Universal Serial Bus Rev. 1.0, PCI Local Bus Specification Rev. 2.2, and PCI Bus Power Management Interface Specification Rev. 1.1.

Features
■ Complies with Universal Serial Bus Specification Rev. 2.0
■ Supports data transfer at high-speed (480 Mbit/s), full-speed (12 Mbit/s) and low-speed (1.5 Mbit/s)
■ Two Original USB OHCI cores comply with Open Host Controller Interface Specification for USB Rev. 1.0a
■ One Hi-Speed USB EHCI core complies with Enhanced Host Controller Interface Specification for Universal Serial Bus Rev. 1.0
■ Supports PCI 32-bit, 33 MHz interface compliant with PCI Local Bus Specification Rev. 2.2, with support for D3cold standby and wake-up modes; all I/O pins are 3.3 V standard
■ Compliant with PCI Bus Power Management Interface Specification Rev. 1.1 for all hosts (EHCI and OHCI), and supports all power states: D0, D1, D2, D3hot and D3cold
■ CLKRUN support for mobile applications, such as internal notebook design
■ Configurable subsystem ID and subsystem Vendor ID through external EEPROM
■ Digital and analog power separation for better Electro-Magnetic Interference (EMI) and Electro-Static Discharge (ESD) protection
■ Supports hot Plug and Play and remote wake-up of peripherals
■ Supports individual power switching and individual overcurrent protection for downstream ports
■ Supports partial dynamic port-routing capability for downstream ports that allows sharing of the same physical downstream ports between the Original USB Host Controller and the Hi-Speed USB Host Controller
■ Uses 12 MHz crystal oscillator to reduce system cost and EMI emissions
■ Supports dual power supply: PCI Vaux(3V3) and VCC
■ Operates at +3.3 V power supply input
■ Low power consumption
■ Full industrial operating temperature range from −40 °C to +85 °C
■ Full-scan design with high fault coverage (93 % to 95 %) ensures high quality
■ Available in LQFP100 package.

Applications
■ Digital consumer appliances
■ Notebook
■ PCI add-on card
■ PC motherboard
■ Set-Top Box (STB)
■ Web appliances.

 

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Part Name(s) : RT9259C RT9259CGA RT9259CGQV RT9259CGS RT9259CPA RT9259CPQV RT9259CPS Richtek
Richtek Technology
Description : 12V Synchronous Buck PWM DC-DC and Linear Power Controller

General Description
The RT9259C is a dual-channel DC/DC controller specifically designed to deliver high quality power where 12V power source is available. This part consists of a synchronous buck controller and an LDO controller. The
synchronous buck controller integrates MOSFET drivers that support 12V+12V bootstrapped voltage for high
efficiency power conversion. The bootstrap diode is builtin to simplify the circuit design and minimize external part count. The LDO controller drives an external N-MOSFET for lower power requirement.

Features
Single 12V Bias Supply
Support Dual Channel Power Conversion
  One Synchronous Rectified Buck PWM Controller
  One Linear Controller
Both Controllers Drive Low Cost N-MOSFETs
Adjustable Frequency from 150kHz to 1MHz and Free-Run Frequency at 230kHz
Small External Component Count
±1% High Accuracy Output Voltage Regulation for Both PWM and LDO Controller
Two Internal VREFPower Support Lower to 0.8V
Adjustable External Compensation
Linear Controller Drives N-MOSFET Pass Transistor
Fully-Adjustable Outputs
Under Voltage Protection for Both Outputs
Over Current Fault Monitor on MOSFET; No Current Sense Resistor is Required.
RoHS Compliant and 100% Lead (Pb)-Free

Applications
Graphic Card GPU, Memory Core Power
Graphic Card Interface Power
Motherboard, Desktop and Servers Chipset and Memory Core Power
IA Equipments
Telecomm Equipments
High Power DC-DC Regulators

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