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74LVQ02

  

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74LVQ02[LOW VOLTAGE CMOS QUAD 2-INPUT NOR GATE]

other part :74LVQ02M   74LVQ02T  

DESCRIPTION
The 74LVQ02 is a low voltage CMOS QUAD 2-INPUT NOR GATE fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. It is ideal for low power and low noise 3.3V applications. The internal circuit is composed of 3 stages including buffer output, which enables high noise immunity and stable output. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess
voltage.

■ HIGH SPEED: tPD = 5 ns (TYP.) at VCC = 3.3 V
■ COMPATIBLE WITH TTL OUTPUTS
■ LOW POWER DISSIPATION: ICC = 2µA(MAX.) at TA=25°C
■ LOW NOISE: VOLP = 0.3V (TYP.) at VCC = 3.3V
■ 75Ω TRANSMISSION LINE DRIVING CAPABILITY
■ SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 12mA (MIN) at VCC = 3.0V
■ PCI BUS LEVELS GUARANTEED AT 24 mA
■ BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL
■ OPERATING VOLTAGE RANGE: VCC(OPR) = 2V to 3.6V (1.2V Data Retention)
■ PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 02
■ IMPROVED LATCH-UP IMMUNITY

STMicroelectronics
ST-Microelectronics

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74LVQ02[Low Voltage Quad 2-Input NOR Gate]

other part :74LVQ02SC   74LVQ02SJ   74LVQ02SCX   74LVQ02SJX  

General Description
The LVQ02 contains four 2-input NOR gates.

Features
■Ideal for low power/low noise 3.3V applications
■Guaranteed simultaneous switching noise level and dynamic threshold performance
■Guaranteed pin-to-pin skew AC performance
■Guaranteed incident wave switching into 75Ω

Fairchild Semiconductor
Fairchild

View

74LVQ02M[LOW VOLTAGE CMOS QUAD 2-INPUT NOR GATE]

other part :74LVQ02   74LVQ02T  

DESCRIPTION
The 74LVQ02 is a low voltage CMOS QUAD 2-INPUT NOR GATE fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. It is ideal for low power and low noise 3.3V applications. The internal circuit is composed of 3 stages including buffer output, which enables high noise immunity and stable output. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess
voltage.

■ HIGH SPEED: tPD = 5 ns (TYP.) at VCC = 3.3 V
■ COMPATIBLE WITH TTL OUTPUTS
■ LOW POWER DISSIPATION: ICC = 2µA(MAX.) at TA=25°C
■ LOW NOISE: VOLP = 0.3V (TYP.) at VCC = 3.3V
■ 75Ω TRANSMISSION LINE DRIVING CAPABILITY
■ SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 12mA (MIN) at VCC = 3.0V
■ PCI BUS LEVELS GUARANTEED AT 24 mA
■ BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL
■ OPERATING VOLTAGE RANGE: VCC(OPR) = 2V to 3.6V (1.2V Data Retention)
■ PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 02
■ IMPROVED LATCH-UP IMMUNITY

STMicroelectronics
ST-Microelectronics

View

74LVQ02T[LOW VOLTAGE CMOS QUAD 2-INPUT NOR GATE]

other part :74LVQ02   74LVQ02M  

DESCRIPTION
The 74LVQ02 is a low voltage CMOS QUAD 2-INPUT NOR GATE fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. It is ideal for low power and low noise 3.3V applications. The internal circuit is composed of 3 stages including buffer output, which enables high noise immunity and stable output. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess
voltage.

■ HIGH SPEED: tPD = 5 ns (TYP.) at VCC = 3.3 V
■ COMPATIBLE WITH TTL OUTPUTS
■ LOW POWER DISSIPATION: ICC = 2µA(MAX.) at TA=25°C
■ LOW NOISE: VOLP = 0.3V (TYP.) at VCC = 3.3V
■ 75Ω TRANSMISSION LINE DRIVING CAPABILITY
■ SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 12mA (MIN) at VCC = 3.0V
■ PCI BUS LEVELS GUARANTEED AT 24 mA
■ BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL
■ OPERATING VOLTAGE RANGE: VCC(OPR) = 2V to 3.6V (1.2V Data Retention)
■ PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 02
■ IMPROVED LATCH-UP IMMUNITY

STMicroelectronics
ST-Microelectronics

View

74LVQ02SC[Low Voltage Quad 2-Input NOR Gate]

other part :74LVQ02   74LVQ02SJ   74LVQ02SCX   74LVQ02SJX  

General Description
The LVQ02 contains four 2-input NOR gates.

Features
■Ideal for low power/low noise 3.3V applications
■Guaranteed simultaneous switching noise level and dynamic threshold performance
■Guaranteed pin-to-pin skew AC performance
■Guaranteed incident wave switching into 75Ω

Fairchild Semiconductor
Fairchild

View

74LVQ02SJ[Low Voltage Quad 2-Input NOR Gate]

other part :74LVQ02   74LVQ02SC   74LVQ02SCX   74LVQ02SJX  

General Description
The LVQ02 contains four 2-input NOR gates.

Features
■Ideal for low power/low noise 3.3V applications
■Guaranteed simultaneous switching noise level and dynamic threshold performance
■Guaranteed pin-to-pin skew AC performance
■Guaranteed incident wave switching into 75Ω

Fairchild Semiconductor
Fairchild

View

74LVQ02SCX[Low Voltage Quad 2-Input NOR Gate]

other part :74LVQ02   74LVQ02SC   74LVQ02SJ   74LVQ02SJX  

General Description
The LVQ02 contains four 2-input NOR gates.

Features
■Ideal for low power/low noise 3.3V applications
■Guaranteed simultaneous switching noise level and dynamic threshold performance
■Guaranteed pin-to-pin skew AC performance
■Guaranteed incident wave switching into 75Ω

Fairchild Semiconductor
Fairchild

View

74LVQ02SJX[Low Voltage Quad 2-Input NOR Gate]

other part :74LVQ02   74LVQ02SC   74LVQ02SJ   74LVQ02SCX  

General Description
The LVQ02 contains four 2-input NOR gates.

Features
■Ideal for low power/low noise 3.3V applications
■Guaranteed simultaneous switching noise level and dynamic threshold performance
■Guaranteed pin-to-pin skew AC performance
■Guaranteed incident wave switching into 75Ω

Fairchild Semiconductor
Fairchild

View

74LVQ02MTR[LOW VOLTAGE CMOS QUAD 2-INPUT NOR GATE]

other part :74LVQ02TTR  

DESCRIPTION
The 74LVQ02 is a low voltage CMOS QUAD 2-INPUT NOR GATE fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. It is ideal for low power and low noise 3.3V applications.
The internal circuit is composed of 3 stages including buffer output, which enables high noise immunity and stable output.
All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage.

■ HIGH SPEED:
   tPD = 5 ns (TYP.) at VCC = 3.3 V
■ COMPATIBLE WITH TTL OUTPUTS
■ LOW POWER DISSIPATION:
   ICC = 2µA(MAX.) at TA=25°C
■ LOW NOISE:
   VOLP = 0.3V (TYP.) at VCC = 3.3V
■ 75Ω TRANSMISSION LINE DRIVING CAPABILITY
■ SYMMETRICAL OUTPUT IMPEDANCE:
   |IOH| = IOL = 12mA (MIN) at VCC = 3.0V
■ PCI BUS LEVELS GUARANTEED AT 24 mA
■ BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL
■ OPERATING VOLTAGE RANGE:
   VCC(OPR) = 2V to 3.6V (1.2V Data Retention)
■ PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 02
■ IMPROVED LATCH-UP IMMUNITY

STMicroelectronics
ST-Microelectronics

View

74LVQ02TTR[LOW VOLTAGE CMOS QUAD 2-INPUT NOR GATE]

other part :74LVQ02MTR  

DESCRIPTION
The 74LVQ02 is a low voltage CMOS QUAD 2-INPUT NOR GATE fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. It is ideal for low power and low noise 3.3V applications.
The internal circuit is composed of 3 stages including buffer output, which enables high noise immunity and stable output.
All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage.

■ HIGH SPEED:
   tPD = 5 ns (TYP.) at VCC = 3.3 V
■ COMPATIBLE WITH TTL OUTPUTS
■ LOW POWER DISSIPATION:
   ICC = 2µA(MAX.) at TA=25°C
■ LOW NOISE:
   VOLP = 0.3V (TYP.) at VCC = 3.3V
■ 75Ω TRANSMISSION LINE DRIVING CAPABILITY
■ SYMMETRICAL OUTPUT IMPEDANCE:
   |IOH| = IOL = 12mA (MIN) at VCC = 3.0V
■ PCI BUS LEVELS GUARANTEED AT 24 mA
■ BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL
■ OPERATING VOLTAGE RANGE:
   VCC(OPR) = 2V to 3.6V (1.2V Data Retention)
■ PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 02
■ IMPROVED LATCH-UP IMMUNITY

STMicroelectronics
ST-Microelectronics

View
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