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74LVQ245

  

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74LVQ245[LOW VOLTAGE CMOS OCTAL BUS TRANSCEIVER (3-STATE)]

other part :74LVQ245M   74LVQ245T  

DESCRIPTION
The LVQ245 is a low voltage CMOS OCTAL BUS TRANSCEIVER (3-STATE) fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. It is ideal for low power and low noise 3.3V applications.
It has better speed performance at 3.3V than 5V LSTTL family combined with the true CMOS low power consumption.

■ HIGH SPEED: tPD = 6 ns (TYP.) at VCC = 3.3V
■ COMPATIBLEWITH TTL OUTPUTS
■ LOW POWER DISSIPATION:
   ICC =5 µA (MAX.) at TA = 25 °C
■ LOW NOISE: VOLP = 0.5V(TYP.) at VCC = 3.3V
■ 75Ω TRANSMISSIONLINE DRIVING CAPABILITY
■ SYMMETRICAL OUTPUT IMPEDANCE:
   |IOH| = IOL = 12 mA (MIN)
■ PCI BUS LEVELSGUARANTEED AT 24mA
■ BALANCEDPROPAGATIONDELAYS: tPLH ≅ tPHL
■ OPERATING VOLTAGERANGE:
   VCC (OPR)= 2V to 3.6V (1.2VData Retention)
■ PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 245
■ IMPROVED LATCH-UP IMMUNITY

STMicroelectronics
ST-Microelectronics

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74LVQ245_1998[Low Voltage Octal Bidirectional Transceiver with 3-STATE Outputs]

other part :74LVQ245SC_1998   74LVQ245SJ_1998   74LVQ245QSC_1998   74LVQ245SCX_1998   74LVQ245SJX_1998   74LVQ245QSCX_1998  

General Description
The LVQ245 contains eight non-inverting bidirectional buffers with 3-STATE outputs and is intended for bus-oriented applications. Current sinking capability is 12 mA at both the A and B ports. The Transmit/Receive (T/R) input determines the direction of data flow through the bidirectional transceiver. Transmit (active-HIGH) enables data from A ports to B ports; Receive (active-LOW) enables data from B ports to A ports. The Output Enable input, when HIGH, disables both A and B ports by placing them in a HIGH Z condition.

Features
■ Ideal for low power/low noise 3.3V applications
■ Implements patented EMI reduction circuitry
■ Available in SOIC JEDEC, SOIC EIAJ and QSOP packages
■ Guaranteed simultaneous switching noise level and
   dynamic threshold performance
■ Improved latch-up immunity
■ Guaranteed incident wave switching into 75Ω
■ 4 kV minimum ESD immunity

Fairchild Semiconductor
Fairchild

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74LVQ245[Low Voltage Octal Bidirectional Transceiver with 3-STATE Outputs]

other part :74LVQ245SC   74LVQ245SJ   74LVQ245QSC   74LVQ245SCX   74LVQ245SJX   74LVQ245QSCX  

General Description
The LVQ245 contains eight non-inverting bidirectional buffers with 3-STATE outputs and is intended for bus-oriented applications. Current sinking capability is 12 mA at both the A and B ports. The Transmit/Receive (T/R) input determines the direction of data flow through the bidirectional transceiver. Transmit (active-HIGH) enables data from A ports to B ports; Receive (active-LOW) enables data from B ports to A ports. The Output Enable input, when HIGH, disables both A and B ports by placing them in a HIGH Z condition.

Features
■ Ideal for low power/low noise 3.3V applications
■ Implements patented EMI reduction circuitry
■ Available in SOIC JEDEC, SOIC EIAJ and QSOP packages
■ Guaranteed simultaneous switching noise level and
   dynamic threshold performance
■ Improved latch-up immunity
■ Guaranteed incident wave switching into 75Ω
■ 4 kV minimum ESD immunity

Fairchild Semiconductor
Fairchild

View

74LVQ245T[LOW VOLTAGE CMOS OCTAL BUS TRANSCEIVER (3-STATE)]

other part :74LVQ245   74LVQ245M  

DESCRIPTION
The LVQ245 is a low voltage CMOS OCTAL BUS TRANSCEIVER (3-STATE) fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. It is ideal for low power and low noise 3.3V applications.
It has better speed performance at 3.3V than 5V LSTTL family combined with the true CMOS low power consumption.

■ HIGH SPEED: tPD = 6 ns (TYP.) at VCC = 3.3V
■ COMPATIBLEWITH TTL OUTPUTS
■ LOW POWER DISSIPATION:
   ICC =5 µA (MAX.) at TA = 25 °C
■ LOW NOISE: VOLP = 0.5V(TYP.) at VCC = 3.3V
■ 75Ω TRANSMISSIONLINE DRIVING CAPABILITY
■ SYMMETRICAL OUTPUT IMPEDANCE:
   |IOH| = IOL = 12 mA (MIN)
■ PCI BUS LEVELSGUARANTEED AT 24mA
■ BALANCEDPROPAGATIONDELAYS: tPLH ≅ tPHL
■ OPERATING VOLTAGERANGE:
   VCC (OPR)= 2V to 3.6V (1.2VData Retention)
■ PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 245
■ IMPROVED LATCH-UP IMMUNITY

STMicroelectronics
ST-Microelectronics

View

74LVQ245M[LOW VOLTAGE CMOS OCTAL BUS TRANSCEIVER (3-STATE)]

other part :74LVQ245   74LVQ245T  

DESCRIPTION
The LVQ245 is a low voltage CMOS OCTAL BUS TRANSCEIVER (3-STATE) fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. It is ideal for low power and low noise 3.3V applications.
It has better speed performance at 3.3V than 5V LSTTL family combined with the true CMOS low power consumption.

■ HIGH SPEED: tPD = 6 ns (TYP.) at VCC = 3.3V
■ COMPATIBLEWITH TTL OUTPUTS
■ LOW POWER DISSIPATION:
   ICC =5 µA (MAX.) at TA = 25 °C
■ LOW NOISE: VOLP = 0.5V(TYP.) at VCC = 3.3V
■ 75Ω TRANSMISSIONLINE DRIVING CAPABILITY
■ SYMMETRICAL OUTPUT IMPEDANCE:
   |IOH| = IOL = 12 mA (MIN)
■ PCI BUS LEVELSGUARANTEED AT 24mA
■ BALANCEDPROPAGATIONDELAYS: tPLH ≅ tPHL
■ OPERATING VOLTAGERANGE:
   VCC (OPR)= 2V to 3.6V (1.2VData Retention)
■ PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 245
■ IMPROVED LATCH-UP IMMUNITY

STMicroelectronics
ST-Microelectronics

View

74LVQ245SC[Low Voltage Octal Bidirectional Transceiver with 3-STATE Outputs]

other part :74LVQ245   74LVQ245SJ   74LVQ245QSC   74LVQ245SCX   74LVQ245SJX   74LVQ245QSCX  

General Description
The LVQ245 contains eight non-inverting bidirectional buffers with 3-STATE outputs and is intended for bus-oriented applications. Current sinking capability is 12 mA at both the A and B ports. The Transmit/Receive (T/R) input determines the direction of data flow through the bidirectional transceiver. Transmit (active-HIGH) enables data from A ports to B ports; Receive (active-LOW) enables data from B ports to A ports. The Output Enable input, when HIGH, disables both A and B ports by placing them in a HIGH Z condition.

Features
■ Ideal for low power/low noise 3.3V applications
■ Implements patented EMI reduction circuitry
■ Available in SOIC JEDEC, SOIC EIAJ and QSOP packages
■ Guaranteed simultaneous switching noise level and
   dynamic threshold performance
■ Improved latch-up immunity
■ Guaranteed incident wave switching into 75Ω
■ 4 kV minimum ESD immunity

Fairchild Semiconductor
Fairchild

View

74LVQ245SJ_1998[Low Voltage Octal Bidirectional Transceiver with 3-STATE Outputs]

other part :74LVQ245_1998   74LVQ245SC_1998   74LVQ245QSC_1998   74LVQ245SCX_1998   74LVQ245SJX_1998   74LVQ245QSCX_1998  

General Description
The LVQ245 contains eight non-inverting bidirectional buffers with 3-STATE outputs and is intended for bus-oriented applications. Current sinking capability is 12 mA at both the A and B ports. The Transmit/Receive (T/R) input determines the direction of data flow through the bidirectional transceiver. Transmit (active-HIGH) enables data from A ports to B ports; Receive (active-LOW) enables data from B ports to A ports. The Output Enable input, when HIGH, disables both A and B ports by placing them in a HIGH Z condition.

Features
■ Ideal for low power/low noise 3.3V applications
■ Implements patented EMI reduction circuitry
■ Available in SOIC JEDEC, SOIC EIAJ and QSOP packages
■ Guaranteed simultaneous switching noise level and
   dynamic threshold performance
■ Improved latch-up immunity
■ Guaranteed incident wave switching into 75Ω
■ 4 kV minimum ESD immunity

Fairchild Semiconductor
Fairchild

View

74LVQ245SJ[Low Voltage Octal Bidirectional Transceiver with 3-STATE Outputs]

other part :74LVQ245   74LVQ245SC   74LVQ245QSC   74LVQ245SCX   74LVQ245SJX   74LVQ245QSCX  

General Description
The LVQ245 contains eight non-inverting bidirectional buffers with 3-STATE outputs and is intended for bus-oriented applications. Current sinking capability is 12 mA at both the A and B ports. The Transmit/Receive (T/R) input determines the direction of data flow through the bidirectional transceiver. Transmit (active-HIGH) enables data from A ports to B ports; Receive (active-LOW) enables data from B ports to A ports. The Output Enable input, when HIGH, disables both A and B ports by placing them in a HIGH Z condition.

Features
■ Ideal for low power/low noise 3.3V applications
■ Implements patented EMI reduction circuitry
■ Available in SOIC JEDEC, SOIC EIAJ and QSOP packages
■ Guaranteed simultaneous switching noise level and
   dynamic threshold performance
■ Improved latch-up immunity
■ Guaranteed incident wave switching into 75Ω
■ 4 kV minimum ESD immunity

Fairchild Semiconductor
Fairchild

View

74LVQ245SC_1998[Low Voltage Octal Bidirectional Transceiver with 3-STATE Outputs]

other part :74LVQ245_1998   74LVQ245SJ_1998   74LVQ245QSC_1998   74LVQ245SCX_1998   74LVQ245SJX_1998   74LVQ245QSCX_1998  

General Description
The LVQ245 contains eight non-inverting bidirectional buffers with 3-STATE outputs and is intended for bus-oriented applications. Current sinking capability is 12 mA at both the A and B ports. The Transmit/Receive (T/R) input determines the direction of data flow through the bidirectional transceiver. Transmit (active-HIGH) enables data from A ports to B ports; Receive (active-LOW) enables data from B ports to A ports. The Output Enable input, when HIGH, disables both A and B ports by placing them in a HIGH Z condition.

Features
■ Ideal for low power/low noise 3.3V applications
■ Implements patented EMI reduction circuitry
■ Available in SOIC JEDEC, SOIC EIAJ and QSOP packages
■ Guaranteed simultaneous switching noise level and
   dynamic threshold performance
■ Improved latch-up immunity
■ Guaranteed incident wave switching into 75Ω
■ 4 kV minimum ESD immunity

Fairchild Semiconductor
Fairchild

View

74LVQ245SCX_1998[Low Voltage Octal Bidirectional Transceiver with 3-STATE Outputs]

other part :74LVQ245_1998   74LVQ245SC_1998   74LVQ245SJ_1998   74LVQ245QSC_1998   74LVQ245SJX_1998   74LVQ245QSCX_1998  

General Description
The LVQ245 contains eight non-inverting bidirectional buffers with 3-STATE outputs and is intended for bus-oriented applications. Current sinking capability is 12 mA at both the A and B ports. The Transmit/Receive (T/R) input determines the direction of data flow through the bidirectional transceiver. Transmit (active-HIGH) enables data from A ports to B ports; Receive (active-LOW) enables data from B ports to A ports. The Output Enable input, when HIGH, disables both A and B ports by placing them in a HIGH Z condition.

Features
■ Ideal for low power/low noise 3.3V applications
■ Implements patented EMI reduction circuitry
■ Available in SOIC JEDEC, SOIC EIAJ and QSOP packages
■ Guaranteed simultaneous switching noise level and
   dynamic threshold performance
■ Improved latch-up immunity
■ Guaranteed incident wave switching into 75Ω
■ 4 kV minimum ESD immunity

Fairchild Semiconductor
Fairchild

View
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