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PIC18LF4520-ISO[28/40/44-Pin Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology]

other part :PIC18F2420   PIC18F2420-E/ML   PIC18F2420-E/P   PIC18F2420-E/PT   PIC18F2420-E/SO   PIC18F2420-E/SP   PIC18F2420-EML  

DEVICE OVERVIEW
This document contains device specific information for the following devices:

• PIC18F2420 • PIC18LF2420
• PIC18F2520 • PIC18LF2520
• PIC18F4420 • PIC18LF4420
• PIC18F4520 • PIC18LF4520

This family offers the advantages of all PIC18 micro controllers – namely, high computational performance at an economical price – with the addition of high endurance, Enhanced Flash program memory. On top of these features, the PIC18F2420/2520/4420/4520 family introduces design enhancements that make these microcontrollers a logical choice for many high performance, power sensitive applications.

Power Managed Modes:
• Run: CPU on, peripherals on
• Idle: CPU off, peripherals on
• Sleep: CPU off, peripherals off
• Idle mode currents down to 5.8 µA typical
• Sleep mode current down to 0.1 µA typical
• Timer1 Oscillator: 1.8 µA, 32 kHz, 2V
• Watchdog Timer: 2.1 µA
• Two-Speed Oscillator Start-up

Peripheral Highlights:
• High-current sink/source 25 mA/25 mA
• Three programmable external interrupts
• Four input change interrupts
• Up to 2 Capture/Compare/PWM (CCP) modules, one with Auto-Shutdown (28-pin devices)
• Enhanced Capture/Compare/PWM (ECCP) module (40/44-pin devices only):
  - One, two or four PWM outputs
  - Selectable polarity
  - Programmable dead time
  - Auto-Shutdown and Auto-Restart
• Master Synchronous Serial Port (MSSP) module
supporting 3-wire SPI™ (all 4 modes) and I2C™ Master and Slave Modes
• Enhanced Addressable USART module:
  - Supports RS-485, RS-232 and LIN 1.2
  - RS-232 operation using internal oscillator block (no external crystal required)
  - Auto-Wake-up on Start bit
  - Auto-Baud Detect
• 10-bit, up to 13-channel Analog-to-Digital Converter module (A/D):
 - Auto-acquisition capability
 - Conversion available during Sleep
• Dual analog comparators with input multiplexing)

Flexible Oscillator Structure:
• Four Crystal modes, up to 40 MHz
• 4X Phase Lock Loop (available for crystal and internal oscillators)
• Two External RC modes, up to 4 MHz
• Two External Clock modes, up to 40 MHz
• Internal oscillator block:
  - 8 user selectable frequencies, from 31 kHz to 8 MHz
  - Provides a complete range of clock speeds from 31 kHz to 32 MHz when used with PLL
  - User tunable to compensate for frequency drift
• Secondary oscillator using Timer1 @ 32 kHz
• Fail-Safe Clock Monitor:
  - Allows for safe shutdown if peripheral clock stops

Special Microcontroller Features:
• C compiler optimized architecture:
- Optional extended instruction set designed to optimize re-entrant code
• 100,000 erase/write cycle Enhanced Flash program memory typical
• 1,000,000 erase/write cycle Data EEPROM memory typical
• Flash/Data EEPROM Retention: 100 years typical
• Self-programmable under software control
• Priority levels for interrupts
• 8 x 8 Single-Cycle Hardware Multiplier
• Extended Watchdog Timer (WDT):
- Programmable period from 4 ms to 131s
• Single-supply 5V In-Circuit Serial Programming™ (ICSP™) via two pins
• In-Circuit Debug (ICD) via two pins
• Wide operating voltage range: 2.0V to 5.5V
• Programmable 16-level High/Low-Voltage

Detection (HLVD) module:
  - Supports interrupt on High/Low-Voltage Detection
• Programmable Brown-out Reset (BOR
  - With software enable option

Microchip Technology
Microchip

View

HEF4520BV.6[Dual binary counter]

other part :HEF4520B   HEF4520B-CNVV.2   HEF4520B-CNVV.3   HEF4520BP   HEF4520BT   HEF4520BT,652   HEF4520BT,653  

General description
The HEF4520B is a dual 4-bit internally synchronous binary counter. The counter has an active HIGH clock input (nCP0) and an active LOW clock input (nCP1), buffered outputs from all four bit positions (nQ0 to nQ3) and an active HIGH overriding asynchronous master reset input (nMR).
The counter advances on either the LOW-to-HIGH transition of the nCP0 input if nCP1 is HIGH or the HIGH-to-LOW transition of the nCP1 input if nCP0 is LOW. Either nCP0 or nCP1 may be used as the clock input to the counter while the other clock input may be used as a clock enable input. Schmitt trigger action makes the clock input highly tolerant of slower clock rise and fall times. A HIGH on nMR resets the counter (nQ0 to nQ3 = LOW) independent of nCP0 and nCP1.
It operates over a recommended VDDpower supply range of 3 V to 15 V referenced to VSS
(usually ground). Unused inputs must be connected to VDD, VSS, or another input.

Features and benefits
 Tolerant of slow clock rise and fall times
 Fully static operation
 5 V, 10 V, and 15 V parametric ratings
 Standardized symmetrical output characteristics
 Specified from 40 C to +85 C
 Complies with JEDEC standard JESD 13-B

NXP Semiconductors.
NXP

View

VRD4520MTX[High speed, low dropout, ±1% High output accuracy CMOS Dual Regulator with ON / OFF switch function]

other part :VRD   VRD0808LLX   VRD0808LNX   VRD0808LTX   VRD0808MLX   VRD0808MNX   VRD0808MTX  

Outline
VRD series are high-speed, low dropout voltage, high output voltage accuracy dual regulator, low dropout to achieve High output accuracy specifications. Because dual regulator IC in the pipeline are individual separate, crosstalk can be large Greatly reduced.

Applications
 Battery powered products
  _ Phone
  _ Digital camera or camcorder
 Portable games
 Handheld instruments

AnaSem Semiconductors
Anasem

View

PIC18F4520-ISP[28/40/44-Pin Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology]

other part :PIC18F2420   PIC18F2420-E/ML   PIC18F2420-E/P   PIC18F2420-E/PT   PIC18F2420-E/SO   PIC18F2420-E/SP   PIC18F2420-EML  

DEVICE OVERVIEW
This document contains device specific information for the following devices:

• PIC18F2420 • PIC18LF2420
• PIC18F2520 • PIC18LF2520
• PIC18F4420 • PIC18LF4420
• PIC18F4520 • PIC18LF4520

This family offers the advantages of all PIC18 micro controllers – namely, high computational performance at an economical price – with the addition of high endurance, Enhanced Flash program memory. On top of these features, the PIC18F2420/2520/4420/4520 family introduces design enhancements that make these microcontrollers a logical choice for many high performance, power sensitive applications.

Power Managed Modes:
• Run: CPU on, peripherals on
• Idle: CPU off, peripherals on
• Sleep: CPU off, peripherals off
• Idle mode currents down to 5.8 µA typical
• Sleep mode current down to 0.1 µA typical
• Timer1 Oscillator: 1.8 µA, 32 kHz, 2V
• Watchdog Timer: 2.1 µA
• Two-Speed Oscillator Start-up

Peripheral Highlights:
• High-current sink/source 25 mA/25 mA
• Three programmable external interrupts
• Four input change interrupts
• Up to 2 Capture/Compare/PWM (CCP) modules, one with Auto-Shutdown (28-pin devices)
• Enhanced Capture/Compare/PWM (ECCP) module (40/44-pin devices only):
  - One, two or four PWM outputs
  - Selectable polarity
  - Programmable dead time
  - Auto-Shutdown and Auto-Restart
• Master Synchronous Serial Port (MSSP) module
supporting 3-wire SPI™ (all 4 modes) and I2C™ Master and Slave Modes
• Enhanced Addressable USART module:
  - Supports RS-485, RS-232 and LIN 1.2
  - RS-232 operation using internal oscillator block (no external crystal required)
  - Auto-Wake-up on Start bit
  - Auto-Baud Detect
• 10-bit, up to 13-channel Analog-to-Digital Converter module (A/D):
 - Auto-acquisition capability
 - Conversion available during Sleep
• Dual analog comparators with input multiplexing)

Flexible Oscillator Structure:
• Four Crystal modes, up to 40 MHz
• 4X Phase Lock Loop (available for crystal and internal oscillators)
• Two External RC modes, up to 4 MHz
• Two External Clock modes, up to 40 MHz
• Internal oscillator block:
  - 8 user selectable frequencies, from 31 kHz to 8 MHz
  - Provides a complete range of clock speeds from 31 kHz to 32 MHz when used with PLL
  - User tunable to compensate for frequency drift
• Secondary oscillator using Timer1 @ 32 kHz
• Fail-Safe Clock Monitor:
  - Allows for safe shutdown if peripheral clock stops

Special Microcontroller Features:
• C compiler optimized architecture:
- Optional extended instruction set designed to optimize re-entrant code
• 100,000 erase/write cycle Enhanced Flash program memory typical
• 1,000,000 erase/write cycle Data EEPROM memory typical
• Flash/Data EEPROM Retention: 100 years typical
• Self-programmable under software control
• Priority levels for interrupts
• 8 x 8 Single-Cycle Hardware Multiplier
• Extended Watchdog Timer (WDT):
- Programmable period from 4 ms to 131s
• Single-supply 5V In-Circuit Serial Programming™ (ICSP™) via two pins
• In-Circuit Debug (ICD) via two pins
• Wide operating voltage range: 2.0V to 5.5V
• Programmable 16-level High/Low-Voltage

Detection (HLVD) module:
  - Supports interrupt on High/Low-Voltage Detection
• Programmable Brown-out Reset (BOR
  - With software enable option

Microchip Technology
Microchip

View

HEF4520B_CNVV.2[Dual binary counter]

other part :HEF4520B   HEF4520B-CNVV.2   HEF4520B-CNVV.3   HEF4520BP   HEF4520BT   HEF4520BT,652   HEF4520BT,653  

General description
The HEF4520B is a dual 4-bit internally synchronous binary counter. The counter has an active HIGH clock input (nCP0) and an active LOW clock input (nCP1), buffered outputs from all four bit positions (nQ0 to nQ3) and an active HIGH overriding asynchronous master reset input (nMR).
The counter advances on either the LOW-to-HIGH transition of the nCP0 input if nCP1 is HIGH or the HIGH-to-LOW transition of the nCP1 input if nCP0 is LOW. Either nCP0 or nCP1 may be used as the clock input to the counter while the other clock input may be used as a clock enable input. Schmitt trigger action makes the clock input highly tolerant of slower clock rise and fall times. A HIGH on nMR resets the counter (nQ0 to nQ3 = LOW) independent of nCP0 and nCP1.
It operates over a recommended VDDpower supply range of 3 V to 15 V referenced to VSS
(usually ground). Unused inputs must be connected to VDD, VSS, or another input.

Features and benefits
 Tolerant of slow clock rise and fall times
 Fully static operation
 5 V, 10 V, and 15 V parametric ratings
 Standardized symmetrical output characteristics
 Specified from 40 C to +85 C
 Complies with JEDEC standard JESD 13-B

NXP Semiconductors.
NXP

View

74HCT4520N[Dual 4-bit synchronous binary counter]

other part :74HCT4520D   74HCT4520DB   74HCT4520U   74HCT4520   74HC4520   74HC4520D   74HC4520DB  

GENERAL DESCRIPTION
The 74HC/HCT4520 are high-speed Si-gate CMOS devices and are pin compatible with the “4520” of the “4000B” series. They are specified in compliance with JEDEC standard no. 7A.
The 74HC/HCT4520 are dual 4-bit internally synchronous binary counters with an active HIGH clock input (nCP0) and an active LOW clock input (nCP1), buffered outputs from all four bit positions (nQ0 to nQ3) and an active HIGH overriding asynchronous master reset input (nMR).
The counter advances on either the LOW-to-HIGH transition of nCP0 if nCP1 is HIGH or the HIGH-to-LOW transition of nCP1 if nCP0 is LOW. Either nCP0 or nCP1 may be used as the clock input to the counter and the other clock input may be used as a clock enable input. A HIGH on nMR resets the counter (nQ0 to nQ3 = LOW) independent of nCP0 and nCP1.

FEATURES
• Output capability: standard
• ICC category: MSI

APPLICATIONS
• Multistage synchronous counting
• Multistage asynchronous counting
• Frequency dividers

Philips Electronics
Philips

View

2SC4520[NPN Epitaxial Planar Silicon Transistors]

other part :C4520  

High-Speed Switching Applications

Features
• Adoption of FBET, MBIT process.
• Large current capacity.
• Low collector-to-emitter saturation voltage.
• Fast switching speed.
• Small-sized package.

SANYO -> Panasonic
SANYO

View

PIC18LF4520-ISP[28/40/44-Pin Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology]

other part :PIC18F2420   PIC18F2420-E/ML   PIC18F2420-E/P   PIC18F2420-E/PT   PIC18F2420-E/SO   PIC18F2420-E/SP   PIC18F2420-EML  

DEVICE OVERVIEW
This document contains device specific information for the following devices:

• PIC18F2420 • PIC18LF2420
• PIC18F2520 • PIC18LF2520
• PIC18F4420 • PIC18LF4420
• PIC18F4520 • PIC18LF4520

This family offers the advantages of all PIC18 micro controllers – namely, high computational performance at an economical price – with the addition of high endurance, Enhanced Flash program memory. On top of these features, the PIC18F2420/2520/4420/4520 family introduces design enhancements that make these microcontrollers a logical choice for many high performance, power sensitive applications.

Power Managed Modes:
• Run: CPU on, peripherals on
• Idle: CPU off, peripherals on
• Sleep: CPU off, peripherals off
• Idle mode currents down to 5.8 µA typical
• Sleep mode current down to 0.1 µA typical
• Timer1 Oscillator: 1.8 µA, 32 kHz, 2V
• Watchdog Timer: 2.1 µA
• Two-Speed Oscillator Start-up

Peripheral Highlights:
• High-current sink/source 25 mA/25 mA
• Three programmable external interrupts
• Four input change interrupts
• Up to 2 Capture/Compare/PWM (CCP) modules, one with Auto-Shutdown (28-pin devices)
• Enhanced Capture/Compare/PWM (ECCP) module (40/44-pin devices only):
  - One, two or four PWM outputs
  - Selectable polarity
  - Programmable dead time
  - Auto-Shutdown and Auto-Restart
• Master Synchronous Serial Port (MSSP) module
supporting 3-wire SPI™ (all 4 modes) and I2C™ Master and Slave Modes
• Enhanced Addressable USART module:
  - Supports RS-485, RS-232 and LIN 1.2
  - RS-232 operation using internal oscillator block (no external crystal required)
  - Auto-Wake-up on Start bit
  - Auto-Baud Detect
• 10-bit, up to 13-channel Analog-to-Digital Converter module (A/D):
 - Auto-acquisition capability
 - Conversion available during Sleep
• Dual analog comparators with input multiplexing)

Flexible Oscillator Structure:
• Four Crystal modes, up to 40 MHz
• 4X Phase Lock Loop (available for crystal and internal oscillators)
• Two External RC modes, up to 4 MHz
• Two External Clock modes, up to 40 MHz
• Internal oscillator block:
  - 8 user selectable frequencies, from 31 kHz to 8 MHz
  - Provides a complete range of clock speeds from 31 kHz to 32 MHz when used with PLL
  - User tunable to compensate for frequency drift
• Secondary oscillator using Timer1 @ 32 kHz
• Fail-Safe Clock Monitor:
  - Allows for safe shutdown if peripheral clock stops

Special Microcontroller Features:
• C compiler optimized architecture:
- Optional extended instruction set designed to optimize re-entrant code
• 100,000 erase/write cycle Enhanced Flash program memory typical
• 1,000,000 erase/write cycle Data EEPROM memory typical
• Flash/Data EEPROM Retention: 100 years typical
• Self-programmable under software control
• Priority levels for interrupts
• 8 x 8 Single-Cycle Hardware Multiplier
• Extended Watchdog Timer (WDT):
- Programmable period from 4 ms to 131s
• Single-supply 5V In-Circuit Serial Programming™ (ICSP™) via two pins
• In-Circuit Debug (ICD) via two pins
• Wide operating voltage range: 2.0V to 5.5V
• Programmable 16-level High/Low-Voltage

Detection (HLVD) module:
  - Supports interrupt on High/Low-Voltage Detection
• Programmable Brown-out Reset (BOR
  - With software enable option

Microchip Technology
Microchip

View

HEF4520B_CNVV.3[Dual binary counter]

other part :HEF4520B   HEF4520B-CNVV.2   HEF4520B-CNVV.3   HEF4520BP   HEF4520BT   HEF4520BT,652   HEF4520BT,653  

General description
The HEF4520B is a dual 4-bit internally synchronous binary counter. The counter has an active HIGH clock input (nCP0) and an active LOW clock input (nCP1), buffered outputs from all four bit positions (nQ0 to nQ3) and an active HIGH overriding asynchronous master reset input (nMR).
The counter advances on either the LOW-to-HIGH transition of the nCP0 input if nCP1 is HIGH or the HIGH-to-LOW transition of the nCP1 input if nCP0 is LOW. Either nCP0 or nCP1 may be used as the clock input to the counter while the other clock input may be used as a clock enable input. Schmitt trigger action makes the clock input highly tolerant of slower clock rise and fall times. A HIGH on nMR resets the counter (nQ0 to nQ3 = LOW) independent of nCP0 and nCP1.
It operates over a recommended VDDpower supply range of 3 V to 15 V referenced to VSS
(usually ground). Unused inputs must be connected to VDD, VSS, or another input.

Features and benefits
 Tolerant of slow clock rise and fall times
 Fully static operation
 5 V, 10 V, and 15 V parametric ratings
 Standardized symmetrical output characteristics
 Specified from 40 C to +85 C
 Complies with JEDEC standard JESD 13-B

NXP Semiconductors.
NXP

View

74HC4520N[Dual 4-bit synchronous binary counter]

other part :74HCT4520D   74HCT4520DB   74HCT4520N   74HCT4520U   74HCT4520   74HC4520   74HC4520D  

GENERAL DESCRIPTION
The 74HC/HCT4520 are high-speed Si-gate CMOS devices and are pin compatible with the “4520” of the “4000B” series. They are specified in compliance with JEDEC standard no. 7A.
The 74HC/HCT4520 are dual 4-bit internally synchronous binary counters with an active HIGH clock input (nCP0) and an active LOW clock input (nCP1), buffered outputs from all four bit positions (nQ0 to nQ3) and an active HIGH overriding asynchronous master reset input (nMR).
The counter advances on either the LOW-to-HIGH transition of nCP0 if nCP1 is HIGH or the HIGH-to-LOW transition of nCP1 if nCP0 is LOW. Either nCP0 or nCP1 may be used as the clock input to the counter and the other clock input may be used as a clock enable input. A HIGH on nMR resets the counter (nQ0 to nQ3 = LOW) independent of nCP0 and nCP1.

FEATURES
• Output capability: standard
• ICC category: MSI

APPLICATIONS
• Multistage synchronous counting
• Multistage asynchronous counting
• Frequency dividers

Philips Electronics
Philips

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