Qdatasheet_Logo    Integrated circuits, Transistor, Semiconductors Search and Free Datasheet PDF Download Site
Part Number :
Home  >>>  74LVC00A Datasheet

74LVC00A

  

Datasheet PDF

Match, Like 74LVC00A 74LVC00AD 74LVC00AM
Start with 74LVC00AB* 74LVC00AD* 74LVC00AM* 74LVC00AP* 74LVC00AS* 74LVC00AT*
End *N74LVC00A
Included *74LVC00AD* *74LVC00AN* *74LVC00AP* *74LVC00AR*

74LVC00A[LOW VOLTAGE CMOS QUAD 2-INPUT NAND GATE HIGH PERFORMANCE]

other part :74LVC00AM   74LVC00AMTR   74LVC00ATTR  

DESCRIPTION
The 74LVC00A is a low voltage CMOS QUAD 2-INPUT NAND GATE fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. It is ideal for 1.65 to 3.6 VCC operations and low power and low noise applications.
   
■ 5V TOLERANT INPUTS
■ HIGH SPEED: tPD = 4.3ns (MAX.) at VCC = 3V
■ POWER DOWN PROTECTION ON INPUTS
    AND OUTPUTS
■ SYMMETRICAL OUTPUT IMPEDANCE:
    |IOH| = IOL = 24mA (MIN) at VCC = 3V
■ PCI BUS LEVELS GUARANTEED AT 24 mA
■ BALANCED PROPAGATION DELAYS:
    tPLH ≅ tPHL
■ OPERATING VOLTAGE RANGE:
    VCC(OPR) = 1.65V to 3.6V (1.2V Data
    Retention)
■ PIN AND FUNCTION COMPATIBLE WITH
    74 SERIES 00
■ LATCH-UP PERFORMANCE EXCEEDS
    500mA (JESD 17)
■ ESD PERFORMANCE:
    HBM > 2000V (MIL STD 883 method 3015);
    MM > 200V
   

STMicroelectronics
ST-Microelectronics

View

74LVC00A[QUADRUPLE 2-INPUT NAND GATES]

other part :74LVC00AS14-13   74LVC00AT14-13  

Description
The 74LVC00A provides four independent 2-input NAND gates. The device is designed for operation with a power supply range of 1.65V to 5.5V. The inputs are tolerant to 5.5V allowing this device to be used in a mixed voltage environment. The device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output preventing damaging current backflow when the device is powered down.
   
Features
• Supply Voltage Range from 1.65V to 5.5V
• Sinks 24mA at VCC = 3.3V
• CMOS low power consumption
• IOFF Supports Partial-Power-Down Mode Operation
• Inputs or outputs accept up to 5.5V
• Inputs can be driven by 3.3V or 5.5V allowing for voltage
    translation applications.
• ESD Protection Exceeds JESD 22
    ▪ 200-V Machine Model (A115-A)
    ▪ 2000-V Human Body Model (A114-A)
    ▪ Exceeds 1000-V Charged Device Model (C101C)
• Latch-Up Exceeds 250mA per JESD 78, Class II
• Range of Package Options SO-14 and TSSOP-14
• Totally Lead-Free & Fully RoHS Compliant (Notes 1 & 2)
• Halogen and Antimony Free. “Green” Device (Note 3)
   
Applications
• Voltage Level Shifting
• General Purpose Logic
• Power Down Signal Isolation
• Wide array of products such as:
    ▪ PCs, networking, notebooks, ultrabooks, netbooks
    ▪ Computer peripherals, hard drives, CD/DVD ROM
    ▪ TV, DVD, DVR, set top box
   

Diodes Incorporated.
Diodes

View

74LVC00A[Triple 3-input AND gate]

other part :74LVC00AD   74LVC00APW   74LVC00ADB   74LVC00APWDH  

DESCRIPTION
The 74LVC00A is a high-performance, low power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families.
   
FEATURES
• Wide supply range of 1.2V to 3.6V
• Complies with JEDEC standard no. 8-1A
• Inputs accept voltages up to 5.5V
• CMOS low power consumption
• Direct interface with TTL levels
• 5-volt tolerant inputs, for interfacing with 5-volt logic
   

Philips Electronics
Philips

View

74LVC00A[Quad 2-input NAND gate]

other part :74LVC00AD   74LVC00ADB   74LVC00APW   74LVC00ABQ  

General description
The 74LVC00A provides four 2-input NAND gates.
Schmitt trigger action at all inputs makes the circuit tolerant of slower input rise and fall times.
Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V applications.
   
Features and benefits
■ 5 V tolerant inputs for interfacing with 5 V logic
■ Wide supply voltage range from 1.2 V to 3.6 V
■ CMOS low-power consumption
■ Direct interface with TTL levels
■ Complies with JEDEC standard:
    ◆ JESD8-7A (1.65 V to 1.95 V)
    ◆ JESD8-5A (2.3 V to 2.7 V)
    ◆ JESD8-C/JESD36 (2.7 V to 3.6 V)
■ ESD protection:
    ◆ HBM JESD22-A114F exceeds 2000 V
    ◆ MM JESD22-A115-B exceeds 200 V
    ◆ CDM JESD22-C101E exceeds 1000 V
■ Specified from −40 °C to +85 °C and −40 °C to +125 °C
   

NXP Semiconductors.
NXP

View

74LVC00A[Low-Voltage CMOS Quad 2-Input NAND Gate]

other part :74LVC00ADR2G   74LVC00ADTR2G  

Low-Voltage CMOS Quad 2-Input NAND Gate
With 5 V−Tolerant Inputs
   
The 74LVC00A is a high performance, quad 2−input NAND gate operating from a 1.2 to 3.6 V supply. High impedance TTL compatible inputs significantly reduce current loading to input drivers while TTL compatible outputs offer improved switching noise performance. A VI specification of 5.5 V allows 74LVC00A inputs to be safely driven from 5 V devices.
Current drive capability is 24 mA at the outputs.
   
Features
• Designed for 1.2 V to 3.6 V VCC Operation
• 5 V Tolerant Inputs − Interface Capability With 5 V TTL Logic
• 24 mA Output Sink and Source Capability
• Near Zero Static Supply Current (10 μA) Substantially Reduces
    System Power Requirements
• ESD Performance: Human Body Model >2000 V
                                 Machine Model >200 V
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
    Compliant
   

ON Semiconductor
ON-Semiconductor

View

74LVC00A_2004[LOW VOLTAGE CMOS QUAD 2-INPUT NAND GATE HIGH PERFORMANCE]

other part :74LVC00AMTR_2004   74LVC00ATTR_2004  

DESCRIPTION
The 74LVC00A is a low voltage CMOS QUAD 2-INPUT NAND GATE fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. It is ideal for 1.65 to 3.6 VCC operations and low power and low noise applications.
   
■ 5V TOLERANT INPUTS
■ HIGH SPEED: tPD = 4.3ns (MAX.) at VCC = 3V
■ POWER DOWN PROTECTION ON INPUTS
    AND OUTPUTS
■ SYMMETRICAL OUTPUT IMPEDANCE:
    |IOH| = IOL = 24mA (MIN) at VCC = 3V
■ PCI BUS LEVELS GUARANTEED AT 24 mA
■ BALANCED PROPAGATION DELAYS:
    tPLH ≅ tPHL
■ OPERATING VOLTAGE RANGE:
    VCC(OPR) = 1.65V to 3.6V (1.2V Data
    Retention)
■ PIN AND FUNCTION COMPATIBLE WITH
    74 SERIES 00
■ LATCH-UP PERFORMANCE EXCEEDS
    500mA (JESD 17)
■ ESD PERFORMANCE:
    HBM > 2000V (MIL STD 883 method 3015);
    MM > 200V
   

STMicroelectronics
ST-Microelectronics

View

74LVC00AD[Triple 3-input AND gate]

other part :74LVC00A   74LVC00APW   74LVC00ADB   74LVC00APWDH  

DESCRIPTION
The 74LVC00A is a high-performance, low power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families.
   
FEATURES
• Wide supply range of 1.2V to 3.6V
• Complies with JEDEC standard no. 8-1A
• Inputs accept voltages up to 5.5V
• CMOS low power consumption
• Direct interface with TTL levels
• 5-volt tolerant inputs, for interfacing with 5-volt logic
   

Philips Electronics
Philips

View

74LVC00AD[Quad 2-input NAND gate]

other part :74LVC00A   74LVC00ADB   74LVC00APW   74LVC00ABQ  

General description
The 74LVC00A provides four 2-input NAND gates.
Schmitt trigger action at all inputs makes the circuit tolerant of slower input rise and fall times.
Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V applications.
   
Features and benefits
■ 5 V tolerant inputs for interfacing with 5 V logic
■ Wide supply voltage range from 1.2 V to 3.6 V
■ CMOS low-power consumption
■ Direct interface with TTL levels
■ Complies with JEDEC standard:
    ◆ JESD8-7A (1.65 V to 1.95 V)
    ◆ JESD8-5A (2.3 V to 2.7 V)
    ◆ JESD8-C/JESD36 (2.7 V to 3.6 V)
■ ESD protection:
    ◆ HBM JESD22-A114F exceeds 2000 V
    ◆ MM JESD22-A115-B exceeds 200 V
    ◆ CDM JESD22-C101E exceeds 1000 V
■ Specified from −40 °C to +85 °C and −40 °C to +125 °C
   

NXP Semiconductors.
NXP

View

74LVC00AM[LOW VOLTAGE CMOS QUAD 2-INPUT NAND GATE HIGH PERFORMANCE]

other part :74LVC00A   74LVC00AMTR   74LVC00ATTR  

DESCRIPTION
The 74LVC00A is a low voltage CMOS QUAD 2-INPUT NAND GATE fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. It is ideal for 1.65 to 3.6 VCC operations and low power and low noise applications.
   
■ 5V TOLERANT INPUTS
■ HIGH SPEED: tPD = 4.3ns (MAX.) at VCC = 3V
■ POWER DOWN PROTECTION ON INPUTS
    AND OUTPUTS
■ SYMMETRICAL OUTPUT IMPEDANCE:
    |IOH| = IOL = 24mA (MIN) at VCC = 3V
■ PCI BUS LEVELS GUARANTEED AT 24 mA
■ BALANCED PROPAGATION DELAYS:
    tPLH ≅ tPHL
■ OPERATING VOLTAGE RANGE:
    VCC(OPR) = 1.65V to 3.6V (1.2V Data
    Retention)
■ PIN AND FUNCTION COMPATIBLE WITH
    74 SERIES 00
■ LATCH-UP PERFORMANCE EXCEEDS
    500mA (JESD 17)
■ ESD PERFORMANCE:
    HBM > 2000V (MIL STD 883 method 3015);
    MM > 200V
   

STMicroelectronics
ST-Microelectronics

View

74LVC00ABQ[Quad 2-input NAND gate]

other part :74LVC00A   74LVC00AD   74LVC00ADB   74LVC00APW  

General description
The 74LVC00A provides four 2-input NAND gates.
Schmitt trigger action at all inputs makes the circuit tolerant of slower input rise and fall times.
Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V applications.
   
Features and benefits
■ 5 V tolerant inputs for interfacing with 5 V logic
■ Wide supply voltage range from 1.2 V to 3.6 V
■ CMOS low-power consumption
■ Direct interface with TTL levels
■ Complies with JEDEC standard:
    ◆ JESD8-7A (1.65 V to 1.95 V)
    ◆ JESD8-5A (2.3 V to 2.7 V)
    ◆ JESD8-C/JESD36 (2.7 V to 3.6 V)
■ ESD protection:
    ◆ HBM JESD22-A114F exceeds 2000 V
    ◆ MM JESD22-A115-B exceeds 200 V
    ◆ CDM JESD22-C101E exceeds 1000 V
■ Specified from −40 °C to +85 °C and −40 °C to +125 °C
   

NXP Semiconductors.
NXP

View
1
 
Key Word
System  Voltage  Analog  Audio  Axial  Battery  Bipolar  Bridge  Camera  Chip  Clock  Color  Connector  Control  Controller  Converter  Counter  Crystal  Decoder  Digital 

@ 2014 - 2018  [ Home ] [ Privacy Policy ] [ Request Datasheet ] [ Contact Us ]