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RC28F640C3BD80[Intel Advanced+ Boot Block Flash Memory (C3)]

other part :28F160C3   28F320C3   28F640C3   28F800C3   GE28F160C3BA100   GE28F160C3BA110   GE28F160C3BA70  

Device Description
This section provides an overview of the Intel® Advanced+ Boot Block Flash Memory (C3) device features, packaging, signal naming, and device architecture.

Product Overview
The C3 device provides high-performance asynchronous reads in package-compatible densities with a 16 bit data bus. Individually-erasable memory blocks are optimally sized for code and data storage. Eight 4 Kword parameter blocks are located in the boot block at either the top or bottom of the device’s memory map. The rest of the memory array is grouped into 32 Kword main blocks.

Product Features
■ Flexible SmartVoltage Technology
   —2.7 V– 3.6 V Read/Program/Erase
   —12 V for Fast Production Programming
■ 1.65 V–2.5 V or 2.7 V–3.6 V I/O Option
   —Reduces Overall System Power
■ High Performance
   —2.7 V– 3.6 V: 70 ns Max Access Time
■ Optimized Architecture for Code Plus Data Storage
   —Eight 4 Kword Blocks, Top or Bottom Parameter Boot
   —Up to One Hundred-Twenty-Seven 32 Kword Blocks
   —Fast Program Suspend Capability
   —Fast Erase Suspend Capability
■ Flexible Block Locking
   —Lock/Unlock Any Block
   —Full Protection on Power-Up
   —WP# Pin for Hardware Block Protection
■ Low Power Consumption
   —9 mA Typical Read
   —7 A Typical Standby with Automatic Power Savings Feature (APS)
■ Extended Temperature Operation
   —–40 °C to +85 °C
■ 128-bit Protection Register
   —64 bit Unique Device Identifier
   —64 bit User Programmable OTP Cells
■ Extended Cycling Capability
   —Minimum 100,000 Block Erase Cycles
■ Software
   —Intel® Flash Data Integrator (FDI)
   —Supports Top or Bottom Boot Storage, Streaming Data (e.g., voice)
   —Intel Basic Command Set
   —Common Flash Interface (CFI)
■ Standard Surface Mount Packaging
   —48-Ball µBGA*/VFBGA
   —64-Ball Easy BGA Packages
   —48-Lead TSOP Package
■ ETOX™ VIII (0.13 µm) Flash Technology
   —16, 32 Mbit
■ ETOX™ VII (0.18 µm) Flash Technology
   —16, 32, 64 Mbit
■ ETOX™ VI (0.25 µm) Flash Technology
   —8, 16 and 32 Mbit

 

Intel
Intel

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TE28F800C3BD80[Intel Advanced+ Boot Block Flash Memory (C3)]

other part :28F160C3   28F320C3   28F640C3   28F800C3   GE28F160C3BA100   GE28F160C3BA110   GE28F160C3BA70  

Device Description
This section provides an overview of the Intel® Advanced+ Boot Block Flash Memory (C3) device features, packaging, signal naming, and device architecture.

Product Overview
The C3 device provides high-performance asynchronous reads in package-compatible densities with a 16 bit data bus. Individually-erasable memory blocks are optimally sized for code and data storage. Eight 4 Kword parameter blocks are located in the boot block at either the top or bottom of the device’s memory map. The rest of the memory array is grouped into 32 Kword main blocks.

Product Features
■ Flexible SmartVoltage Technology
   —2.7 V– 3.6 V Read/Program/Erase
   —12 V for Fast Production Programming
■ 1.65 V–2.5 V or 2.7 V–3.6 V I/O Option
   —Reduces Overall System Power
■ High Performance
   —2.7 V– 3.6 V: 70 ns Max Access Time
■ Optimized Architecture for Code Plus Data Storage
   —Eight 4 Kword Blocks, Top or Bottom Parameter Boot
   —Up to One Hundred-Twenty-Seven 32 Kword Blocks
   —Fast Program Suspend Capability
   —Fast Erase Suspend Capability
■ Flexible Block Locking
   —Lock/Unlock Any Block
   —Full Protection on Power-Up
   —WP# Pin for Hardware Block Protection
■ Low Power Consumption
   —9 mA Typical Read
   —7 A Typical Standby with Automatic Power Savings Feature (APS)
■ Extended Temperature Operation
   —–40 °C to +85 °C
■ 128-bit Protection Register
   —64 bit Unique Device Identifier
   —64 bit User Programmable OTP Cells
■ Extended Cycling Capability
   —Minimum 100,000 Block Erase Cycles
■ Software
   —Intel® Flash Data Integrator (FDI)
   —Supports Top or Bottom Boot Storage, Streaming Data (e.g., voice)
   —Intel Basic Command Set
   —Common Flash Interface (CFI)
■ Standard Surface Mount Packaging
   —48-Ball µBGA*/VFBGA
   —64-Ball Easy BGA Packages
   —48-Lead TSOP Package
■ ETOX™ VIII (0.13 µm) Flash Technology
   —16, 32 Mbit
■ ETOX™ VII (0.18 µm) Flash Technology
   —16, 32, 64 Mbit
■ ETOX™ VI (0.25 µm) Flash Technology
   —8, 16 and 32 Mbit

 

Intel
Intel

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M36DR432BD85ZA[32 Mbit (2Mb x16, Dual Bank, Page) Flash Memory and 4 Mbit (256Kb x16) SRAM, Multiple Memory Product]

other part :M36DR432AD10ZA   M36DR432AD10ZA6   M36DR432AD12ZA   M36DR432AD12ZA6   M36DR432AD85ZA   M36DR432AD85ZA6   M36DR432BD10ZA  

SUMMARY DESCRIPTION
The M36DR432AD/BD is a low-voltage Multiple Memory Product which combines two memory de vices: a 32 Mbit (2Mbit x16) non-volatile Flash memory and a 4 Mbit SRAM.
The memory is available in a Stacked LFBGA66 12x8mm - 8x8 active ball array, 0.8mm pitch pack age and supplied with all the bits erased (set to ‘1’).

FEATURES SUMMARY
■ Multiple Memory Product
   – 1 bank of 32 Mbit (2Mb x16) Flash Memory
   – 1 bank of 4 Mbit (256Kb x16) SRAM
■ SUPPLY VOLTAGE
   – VDDF = VDDS =1.65V to 2.2V
   – VPPF = 12V for Fast Program (optional)
■ ACCESS TIMES: 85ns, 100ns, 120ns
■ LOW POWER CONSUMPTION
■ ELECTRONIC SIGNATURE
   – Manufacturer Code: 0020h
   – Top Device Code, M36DR432AD: 00A0h
   – Bottom Device Code, M36DR432BD: 00A1h

FLASH MEMORY
■ MEMORY BLOCKS
   – Dual Bank Memory Array: 4 Mbit, 28 Mbit
   – Parameter Blocks (Top or Bottom location)
■ PROGRAMMING TIME
   – 10µs by Word typical
   – Double Word Program Option
■ ASYNCHRONOUS PAGE MODE READ
   – Page Width: 4 Words
   – Page Access: 35ns
   – Random Access: 85ns, 100ns, 120ns
■ DUAL BANK OPERATIONS
   – Read within one Bank while Program or
      Erase within the other
   – No delay between Read and Write operations
■ BLOCK LOCKING
   – All blocks locked at Power up
   – Any combination of blocks can be locked
   – WPF for Block Lock-Down
■ COMMON FLASH INTERFACE (CFI)
   – 64 bit Unique Device Identifier
   – 64 bit User Programmable OTP Cells
■ ERASE SUSPEND and RESUME MODES
■ 100,000 PROGRAM/ERASE CYCLES per BLOCK
■ 20 YEARS DATA RETENTION
   – Defectivity below 1ppm/year

SRAM
■ 4 Mbit (256Kb x16)
■ LOW VDDS DATA RETENTION: 1.0V
■ POWER DOWN FEATURES USING TWO CHIP ENABLE INPUTS

STMicroelectronics
ST-Microelectronics

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GE28F800C3BD80[Intel Advanced+ Boot Block Flash Memory (C3)]

other part :28F160C3   28F320C3   28F640C3   28F800C3   GE28F160C3BA100   GE28F160C3BA110   GE28F160C3BA70  

Device Description
This section provides an overview of the Intel® Advanced+ Boot Block Flash Memory (C3) device features, packaging, signal naming, and device architecture.

Product Overview
The C3 device provides high-performance asynchronous reads in package-compatible densities with a 16 bit data bus. Individually-erasable memory blocks are optimally sized for code and data storage. Eight 4 Kword parameter blocks are located in the boot block at either the top or bottom of the device’s memory map. The rest of the memory array is grouped into 32 Kword main blocks.

Product Features
■ Flexible SmartVoltage Technology
   —2.7 V– 3.6 V Read/Program/Erase
   —12 V for Fast Production Programming
■ 1.65 V–2.5 V or 2.7 V–3.6 V I/O Option
   —Reduces Overall System Power
■ High Performance
   —2.7 V– 3.6 V: 70 ns Max Access Time
■ Optimized Architecture for Code Plus Data Storage
   —Eight 4 Kword Blocks, Top or Bottom Parameter Boot
   —Up to One Hundred-Twenty-Seven 32 Kword Blocks
   —Fast Program Suspend Capability
   —Fast Erase Suspend Capability
■ Flexible Block Locking
   —Lock/Unlock Any Block
   —Full Protection on Power-Up
   —WP# Pin for Hardware Block Protection
■ Low Power Consumption
   —9 mA Typical Read
   —7 A Typical Standby with Automatic Power Savings Feature (APS)
■ Extended Temperature Operation
   —–40 °C to +85 °C
■ 128-bit Protection Register
   —64 bit Unique Device Identifier
   —64 bit User Programmable OTP Cells
■ Extended Cycling Capability
   —Minimum 100,000 Block Erase Cycles
■ Software
   —Intel® Flash Data Integrator (FDI)
   —Supports Top or Bottom Boot Storage, Streaming Data (e.g., voice)
   —Intel Basic Command Set
   —Common Flash Interface (CFI)
■ Standard Surface Mount Packaging
   —48-Ball µBGA*/VFBGA
   —64-Ball Easy BGA Packages
   —48-Lead TSOP Package
■ ETOX™ VIII (0.13 µm) Flash Technology
   —16, 32 Mbit
■ ETOX™ VII (0.18 µm) Flash Technology
   —16, 32, 64 Mbit
■ ETOX™ VI (0.25 µm) Flash Technology
   —8, 16 and 32 Mbit

 

Intel
Intel

View

RC28F160C3BD80[Intel Advanced+ Boot Block Flash Memory (C3)]

other part :28F160C3   28F320C3   28F640C3   28F800C3   GE28F160C3BA100   GE28F160C3BA110   GE28F160C3BA70  

Device Description
This section provides an overview of the Intel® Advanced+ Boot Block Flash Memory (C3) device features, packaging, signal naming, and device architecture.

Product Overview
The C3 device provides high-performance asynchronous reads in package-compatible densities with a 16 bit data bus. Individually-erasable memory blocks are optimally sized for code and data storage. Eight 4 Kword parameter blocks are located in the boot block at either the top or bottom of the device’s memory map. The rest of the memory array is grouped into 32 Kword main blocks.

Product Features
■ Flexible SmartVoltage Technology
   —2.7 V– 3.6 V Read/Program/Erase
   —12 V for Fast Production Programming
■ 1.65 V–2.5 V or 2.7 V–3.6 V I/O Option
   —Reduces Overall System Power
■ High Performance
   —2.7 V– 3.6 V: 70 ns Max Access Time
■ Optimized Architecture for Code Plus Data Storage
   —Eight 4 Kword Blocks, Top or Bottom Parameter Boot
   —Up to One Hundred-Twenty-Seven 32 Kword Blocks
   —Fast Program Suspend Capability
   —Fast Erase Suspend Capability
■ Flexible Block Locking
   —Lock/Unlock Any Block
   —Full Protection on Power-Up
   —WP# Pin for Hardware Block Protection
■ Low Power Consumption
   —9 mA Typical Read
   —7 A Typical Standby with Automatic Power Savings Feature (APS)
■ Extended Temperature Operation
   —–40 °C to +85 °C
■ 128-bit Protection Register
   —64 bit Unique Device Identifier
   —64 bit User Programmable OTP Cells
■ Extended Cycling Capability
   —Minimum 100,000 Block Erase Cycles
■ Software
   —Intel® Flash Data Integrator (FDI)
   —Supports Top or Bottom Boot Storage, Streaming Data (e.g., voice)
   —Intel Basic Command Set
   —Common Flash Interface (CFI)
■ Standard Surface Mount Packaging
   —48-Ball µBGA*/VFBGA
   —64-Ball Easy BGA Packages
   —48-Lead TSOP Package
■ ETOX™ VIII (0.13 µm) Flash Technology
   —16, 32 Mbit
■ ETOX™ VII (0.18 µm) Flash Technology
   —16, 32, 64 Mbit
■ ETOX™ VI (0.25 µm) Flash Technology
   —8, 16 and 32 Mbit

 

Intel
Intel

View

TE28F320C3BD80[Intel Advanced+ Boot Block Flash Memory (C3)]

other part :28F160C3   28F320C3   28F640C3   28F800C3   GE28F160C3BA100   GE28F160C3BA110   GE28F160C3BA70  

Device Description
This section provides an overview of the Intel® Advanced+ Boot Block Flash Memory (C3) device features, packaging, signal naming, and device architecture.

Product Overview
The C3 device provides high-performance asynchronous reads in package-compatible densities with a 16 bit data bus. Individually-erasable memory blocks are optimally sized for code and data storage. Eight 4 Kword parameter blocks are located in the boot block at either the top or bottom of the device’s memory map. The rest of the memory array is grouped into 32 Kword main blocks.

Product Features
■ Flexible SmartVoltage Technology
   —2.7 V– 3.6 V Read/Program/Erase
   —12 V for Fast Production Programming
■ 1.65 V–2.5 V or 2.7 V–3.6 V I/O Option
   —Reduces Overall System Power
■ High Performance
   —2.7 V– 3.6 V: 70 ns Max Access Time
■ Optimized Architecture for Code Plus Data Storage
   —Eight 4 Kword Blocks, Top or Bottom Parameter Boot
   —Up to One Hundred-Twenty-Seven 32 Kword Blocks
   —Fast Program Suspend Capability
   —Fast Erase Suspend Capability
■ Flexible Block Locking
   —Lock/Unlock Any Block
   —Full Protection on Power-Up
   —WP# Pin for Hardware Block Protection
■ Low Power Consumption
   —9 mA Typical Read
   —7 A Typical Standby with Automatic Power Savings Feature (APS)
■ Extended Temperature Operation
   —–40 °C to +85 °C
■ 128-bit Protection Register
   —64 bit Unique Device Identifier
   —64 bit User Programmable OTP Cells
■ Extended Cycling Capability
   —Minimum 100,000 Block Erase Cycles
■ Software
   —Intel® Flash Data Integrator (FDI)
   —Supports Top or Bottom Boot Storage, Streaming Data (e.g., voice)
   —Intel Basic Command Set
   —Common Flash Interface (CFI)
■ Standard Surface Mount Packaging
   —48-Ball µBGA*/VFBGA
   —64-Ball Easy BGA Packages
   —48-Lead TSOP Package
■ ETOX™ VIII (0.13 µm) Flash Technology
   —16, 32 Mbit
■ ETOX™ VII (0.18 µm) Flash Technology
   —16, 32, 64 Mbit
■ ETOX™ VI (0.25 µm) Flash Technology
   —8, 16 and 32 Mbit

 

Intel
Intel

View

TL592BD8[DIFFERENTIAL VIDEO AMPLIFIER]

other part :TL592B   TL592B-8D   TL592B-8DR   TL592BD14   TL592BI-8D   TL592BN   TL592BP  

DESCRIPTION
This device is a monolithic two-stage video amplifier with differential inputs and differential outputs. It features internal series-shunt feedback that provides wide bandwidth, low phase distortion, and excellent gain stability. Emitter-follower outputs enable the device to drive capacitive loads. All stages are current-source biased to obtain high common-mode and supply-voltage rejection ratios.
The differential gain is typically 400 when the gain adjust pins are connected together, or amplification may be adjusted for near 0 to 400 by the use of a single external resistor connected between the gain adjustment pins A and B. No external frequency-compensating components are required for any gain option.
The device is particularly useful in magnetic-tape or disk-file systems using phase or NRZ encoding and in high-speed thin-film or plated-wire memories. Other applications include general-purpose video and pulse amplifiers.

FEATURES
• Adjustable Gain to 400 (Typ)
• No Frequency Compensation Required
• Low Noise . . . 3-mV Vn (Typ)

 

Texas Instruments
TI

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R5F71476BD80FPV[Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family]

other part :R5F7142   R5F71424AK64FPV   R5F71424BJ80FPV   R5F71426AK64FPV   R5F71426BD80FPV   R5F71426BJ80FPV   R5F7147  

Overview
Features
This LSI is a single-chip RISC (Reduced Instruction Set Computer) microcomputer that integrates a Renesas Technology original RISC CPU core with peripheral functions required for system configuration.

The CPU in this LSI has a RISC-type instruction set. Most instructions can be executed in one state (one system clock cycle), which greatly improves instruction execution speed. In addition, he 32-bit internal-bus architecture enhances data processing power. With this CPU, it has become possible to assemble low-cost, high-performance, and high-functioning systems, even for applications that were previously impossible with microcomputers, such as real-time control, which demands high speeds.

In addition, this LSI includes on-chip peripheral functions necessary for system configuration, such as large-capacity ROM and RAM, a data transfer controller (DTC), timers, a serial communication interface (SCI), a synchronous serial communication unit, an A/D converter, an nterrupt controller (INTC), I/O ports, and controller area network (RCAN-ET).

This LSI also provides an external memory access support function to enable direct connection to various memory devices or peripheral LSIs. These on-chip functions significantly reduce costs of designing and manufacturing application systems.

The version of on-chip ROM is F-ZTATTM (Flexible Zero Turn Around Time)* that includes flash memory. The flash memory can be programmed with a programmer that supports programming of his LSI, and can also be programmed and erased by software. This enables LSI chip to be reprogrammed at a user-site while mounted on a board.
The features of this LSI are listed in table 1.1.Overview
 

Renesas Electronics
Renesas

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GE28F320C3BD80[Intel Advanced+ Boot Block Flash Memory (C3)]

other part :28F160C3   28F320C3   28F640C3   28F800C3   GE28F160C3BA100   GE28F160C3BA110   GE28F160C3BA70  

Device Description
This section provides an overview of the Intel® Advanced+ Boot Block Flash Memory (C3) device features, packaging, signal naming, and device architecture.

Product Overview
The C3 device provides high-performance asynchronous reads in package-compatible densities with a 16 bit data bus. Individually-erasable memory blocks are optimally sized for code and data storage. Eight 4 Kword parameter blocks are located in the boot block at either the top or bottom of the device’s memory map. The rest of the memory array is grouped into 32 Kword main blocks.

Product Features
■ Flexible SmartVoltage Technology
   —2.7 V– 3.6 V Read/Program/Erase
   —12 V for Fast Production Programming
■ 1.65 V–2.5 V or 2.7 V–3.6 V I/O Option
   —Reduces Overall System Power
■ High Performance
   —2.7 V– 3.6 V: 70 ns Max Access Time
■ Optimized Architecture for Code Plus Data Storage
   —Eight 4 Kword Blocks, Top or Bottom Parameter Boot
   —Up to One Hundred-Twenty-Seven 32 Kword Blocks
   —Fast Program Suspend Capability
   —Fast Erase Suspend Capability
■ Flexible Block Locking
   —Lock/Unlock Any Block
   —Full Protection on Power-Up
   —WP# Pin for Hardware Block Protection
■ Low Power Consumption
   —9 mA Typical Read
   —7 A Typical Standby with Automatic Power Savings Feature (APS)
■ Extended Temperature Operation
   —–40 °C to +85 °C
■ 128-bit Protection Register
   —64 bit Unique Device Identifier
   —64 bit User Programmable OTP Cells
■ Extended Cycling Capability
   —Minimum 100,000 Block Erase Cycles
■ Software
   —Intel® Flash Data Integrator (FDI)
   —Supports Top or Bottom Boot Storage, Streaming Data (e.g., voice)
   —Intel Basic Command Set
   —Common Flash Interface (CFI)
■ Standard Surface Mount Packaging
   —48-Ball µBGA*/VFBGA
   —64-Ball Easy BGA Packages
   —48-Lead TSOP Package
■ ETOX™ VIII (0.13 µm) Flash Technology
   —16, 32 Mbit
■ ETOX™ VII (0.18 µm) Flash Technology
   —16, 32, 64 Mbit
■ ETOX™ VI (0.25 µm) Flash Technology
   —8, 16 and 32 Mbit

 

Intel
Intel

View

GT28F640C3BD80[Intel Advanced+ Boot Block Flash Memory (C3)]

other part :28F160C3   28F320C3   28F640C3   28F800C3   GE28F160C3BA100   GE28F160C3BA110   GE28F160C3BA70  

Device Description
This section provides an overview of the Intel® Advanced+ Boot Block Flash Memory (C3) device features, packaging, signal naming, and device architecture.

Product Overview
The C3 device provides high-performance asynchronous reads in package-compatible densities with a 16 bit data bus. Individually-erasable memory blocks are optimally sized for code and data storage. Eight 4 Kword parameter blocks are located in the boot block at either the top or bottom of the device’s memory map. The rest of the memory array is grouped into 32 Kword main blocks.

Product Features
■ Flexible SmartVoltage Technology
   —2.7 V– 3.6 V Read/Program/Erase
   —12 V for Fast Production Programming
■ 1.65 V–2.5 V or 2.7 V–3.6 V I/O Option
   —Reduces Overall System Power
■ High Performance
   —2.7 V– 3.6 V: 70 ns Max Access Time
■ Optimized Architecture for Code Plus Data Storage
   —Eight 4 Kword Blocks, Top or Bottom Parameter Boot
   —Up to One Hundred-Twenty-Seven 32 Kword Blocks
   —Fast Program Suspend Capability
   —Fast Erase Suspend Capability
■ Flexible Block Locking
   —Lock/Unlock Any Block
   —Full Protection on Power-Up
   —WP# Pin for Hardware Block Protection
■ Low Power Consumption
   —9 mA Typical Read
   —7 A Typical Standby with Automatic Power Savings Feature (APS)
■ Extended Temperature Operation
   —–40 °C to +85 °C
■ 128-bit Protection Register
   —64 bit Unique Device Identifier
   —64 bit User Programmable OTP Cells
■ Extended Cycling Capability
   —Minimum 100,000 Block Erase Cycles
■ Software
   —Intel® Flash Data Integrator (FDI)
   —Supports Top or Bottom Boot Storage, Streaming Data (e.g., voice)
   —Intel Basic Command Set
   —Common Flash Interface (CFI)
■ Standard Surface Mount Packaging
   —48-Ball µBGA*/VFBGA
   —64-Ball Easy BGA Packages
   —48-Lead TSOP Package
■ ETOX™ VIII (0.13 µm) Flash Technology
   —16, 32 Mbit
■ ETOX™ VII (0.18 µm) Flash Technology
   —16, 32, 64 Mbit
■ ETOX™ VI (0.25 µm) Flash Technology
   —8, 16 and 32 Mbit

 

Intel
Intel

View
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