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NE32500N

  

Datasheet PDF - California Eastern Laboratories.

NE32500N image

Part Name
NE32500N

Other PDF
  no available.

PDF

page
3 Pages

File Size
79.3 kB

MFG CO.
CEL
California Eastern Laboratories. 

DESCRIPTION
NECs NE32500 is a Hetero-Junction FET chip that uses the junction between Si-doped AlGaAs and undoped InGaAs to create very high mobility electrons. Its excellent low noise figure and high associated gain make it suitable for commercial systems and industrial applications.
NECs stringent quality assurance and test procedures assure the highest reliability and performance.

FEATURES
• SUPER LOW NOISE FIGURE: 0.45 dB TYP at 12 GHz
• HIGH ASSOCIATED GAIN: 12.5 dB TYP at 12 GHz
• GATE LENGTH: LG = 0.20 µm
• GATE WIDTH: WG = 200 µm


Part Name
Description
PDF
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C to Ka BAND SUPER LOW NOISE AMPLIFIER N-CHANNEL HJ-FET CHIP
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C to Ku BAND SUPER LOW NOISE AMPLIFIER N-CHANNEL HJ-FET
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C to Ku BAND SUPER LOW NOISE AMPLIFIER N-CHANNEL HJ-FET
NEC => Renesas Technology
C to Ku BAND SUPER LOW NOISE AMPLIFIER N-CHANNEL HJ-FET
NEC => Renesas Technology
C to Ku BAND SUPER LOW NOISE AMPLIFIER N-CHANNEL HJ-FET
NEC => Renesas Technology
C to Ku BAND SUPER LOW NOISE AMPLIFIER N-CHANNEL HJ-FET
NEC => Renesas Technology
C BAND SUPER LOW NOISE HJ FET
NEC => Renesas Technology
L to S BAND LOW NOISE AMPLIFIER N-CHANNEL HJ-FET
NEC => Renesas Technology

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