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Description : High Performance E2CMOS® In-System Programmable Logic

GENERAL DESCRIPTION
The MACH® 4 family from Lattice offers an exceptionally flexible architecture and delivers a superior Complex Programmable Logic Device (CPLD) solution of easy-to-use silicon products and software tools. The overall benefits for users are a guaranteed and predictable CPLD solution, faster time-to-market, greater flexibility and lower cost. The MACH 4 devices offer densities ranging from 32 to 256 macrocells with 100% utilization and 100% pin-out retention.
The MACH 4 family offer 5-V (M4-xxx) and 3.3-V (M4LV-xxx) operation.

FEATURES
◆ High-performance, E2CMOS 3.3-V & 5-V CPLD families
◆ Flexible architecture for rapid logic designs
    — Excellent First-Time-FitTM and refit feature
    — SpeedLockingTM performance for guaranteed fixed timing
    — Central, input and output switch matrices for 100% routability and 100% pin-out retention
◆ High speed
    — 7.5ns tPD Commercial and 10ns tPD Industrial
    — 111.1MHz fCNT
◆ 32 to 256 macrocells; 32 to 384 registers
◆ 44 to 256 pins in PLCC, PQFP, TQFP and BGA packages
◆ Flexible architecture for a wide range of design styles
    — D/T registers and latches
    — Synchronous or asynchronous mode
    — Dedicated input registers
    — Programmable polarity
    — Reset/ preset swapping
◆ Advanced capabilities for easy system integration
    — 3.3-V & 5-V JEDEC-compliant operations
    — JTAG (IEEE 1149.1) compliant for boundary scan testing
    — 3.3-V & 5-V JTAG in-system programming
    — PCI compliant (-7/-10/-12 speed grades)
    — Safe for mixed supply voltage system designs
    — Bus-FriendlyTM inputs and I/Os
    — Programmable security bit
    — Individual output slew rate control
◆ Advanced E2CMOS process provides high-performance, cost-effective solutions
◆ Supported by ispDesignEXPERTTM software for rapid logic development
    — Supports HDL design methodologies with results optimized for MACH 4
    — Flexibility to adapt to user requirements
    — Software partnerships that ensure customer success
◆ Lattice and third-party hardware programming support
    — LatticePROTM software for in-system programmability support on PCs and automated test equipment
    — Programming support on all major programmers including Data I/O, BP Microsystems, Advin, and System General

Description : ispMACH™ 4A CPLD Family High Performance E2CMOS® In-System Programmable Logic

GENERAL DESCRIPTION
The ispMACH™ 4A family from Lattice offers an exceptionally flexible architecture and delivers a superior Complex Programmable Logic Device (CPLD) solution of easy-to-use silicon products and software tools. The overall benefits for users are a guaranteed and predictable CPLD solution, faster time-to-market, greater flexibility and lower cost. The ispMACH 4A devices offer densities ranging from 32 to 512 macrocells with 100% utilization and 100% pin-out retention.
The ispMACH 4A families offer 5-V (M4A5-xxx) and 3.3-V (M4A3-xxx) operation.
   
FEATURES
◆ High-performance, E2CMOS 3.3-V & 5-V CPLD families
◆ Flexible architecture for rapid logic designs
    — Excellent First-Time-FitTM and refit feature
    — SpeedLockingTM performance for guaranteed fixed timing
    — Central, input and output switch matrices
        for 100% routability and 100% pin-out retention
◆ High speed
    — 5.0ns tPD Commercial and 7.5ns tPD Industrial
    — 182MHz fCNT
◆ 32 to 512 macrocells; 32 to 768 registers
◆ 44 to 388 pins in PLCC, PQFP, TQFP, BGA, fpBGA and caBGA packages
◆ Flexible architecture for a wide range of design styles
    — D/T registers and latches
    — Synchronous or asynchronous mode
    — Dedicated input registers
    — Programmable polarity
    — Reset/ preset swapping
◆ Advanced capabilities for easy system integration
    — 3.3-V & 5-V JEDEC-compliant operations
    — JTAG (IEEE 1149.1) compliant for boundary scan testing
    — 3.3-V & 5-V JTAG in-system programming
    — PCI compliant (-5/-55/-6/-65/-7/-10/-12 speed grades)
    — Safe for mixed supply voltage system designs
    — Programmable pull-up or Bus-FriendlyTM inputs and I/Os
    — Hot-socketing
    — Programmable security bit
    — Individual output slew rate control
◆ Advanced E2CMOS process provides high-performance, cost-effective solutions
◆ Supported by ispDesignEXPERTTM software for rapid logic development
    — Supports HDL design methodologies with results optimized
        for ispMACH 4A
    — Flexibility to adapt to user requirements
    — Software partnerships that ensure customer success
◆ Lattice and third-party hardware programming support
    — LatticePROTM software for in-system programmability support
        on PCs and automated test equipment
    — Programming support on all major programmers
        including Data I/O, BP Microsystems, Advin,
        and System General
   

Description : CONNECTOR, ELECTRICAL RECEPTACLE TYPE 97-3102A, OLIVE DRAB CADMIUM PLATED

CONNECTOR, ELECTRICAL RECEPTACLE TYPE 97-3102A, OLIVE DRAB CADMIUM PLATED

Description : High Performance E2CMOS® In-System Programmable Logic

GENERAL DESCRIPTION
The ispMACH™ 4A family from Lattice offers an exceptionally flexible architecture and delivers a superior Complex Programmable Logic Device (CPLD) solution of easy-to-use silicon products and software tools. The overall benefits for users are a guaranteed and predictable CPLD solution, faster time-to-market, greater flexibility and lower cost. The ispMACH 4A devices offer densities ranging from 32 to 512 macrocells with 100% utilization and 100% pin-out retention. The ispMACH 4A families offer 5-V (M4A5- xxx) and 3.3-V (M4A3-xxx) operation.

FEATURES
◆ High-performance, E2CMOS 3.3-V & 5-V CPLD families
◆ Flexible architecture for rapid logic designs
    — Excellent First-Time-FitTM and refit feature
    — SpeedLockingTM performance for guaranteed fixed timing
    — Central, input and output switch matrices for 100% routability and 100% pin-out retention
◆ High speed
    — 5.0ns tPD Commercial and 7.5ns tPD Industrial
    — 182MHz fCNT
◆ 32 to 512 macrocells; 32 to 768 registers
◆ 44 to 388 pins in PLCC, PQFP, TQFP, BGA, fpBGA and caBGA packages
◆ Flexible architecture for a wide range of design styles
    — D/T registers and latches
    — Synchronous or asynchronous mode
    — Dedicated input registers
    — Programmable polarity
    — Reset/ preset swapping
◆ Advanced capabilities for easy system integration
    — 3.3-V & 5-V JEDEC-compliant operations
    — JTAG (IEEE 1149.1) compliant for boundary scan testing
    — 3.3-V & 5-V JTAG in-system programming
    — PCI compliant (-5/-55/-6/-65/-7/-10/-12 speed grades)
    — Safe for mixed supply voltage system designs
    — Programmable pull-up or Bus-FriendlyTM inputs and I/Os
    — Hot-socketing
    — Programmable security bit
    — Individual output slew rate control
◆ Advanced E2CMOS process provides high-performance, cost-effective solutions
◆ Lead-free package options

Description : High Performance E2CMOS® In-System Programmable Logic

GENERAL DESCRIPTION
The ispMACH™ 4A family from Lattice offers an exceptionally flexible architecture and delivers a superior Complex Programmable Logic Device (CPLD) solution of easy-to-use silicon products and software tools. The overall benefits for users are a guaranteed and predictable CPLD solution, faster time-to-market, greater flexibility and lower cost. The ispMACH 4A devices offer densities ranging from 32 to 512 macrocells with 100% utilization and 100% pin-out retention. The ispMACH 4A families offer 5-V (M4A5-xxx) and 3.3-V (M4A3-xxx) operation.

FEATURES
◆ High-performance, E2CMOS 3.3-V & 5-V CPLD families
◆ Flexible architecture for rapid logic designs
   — Excellent First-Time-FitTM and refit feature
   — SpeedLockingTM performance for guaranteed fixed timing
   — Central, input and output switch matrices for 100% routability and 100% pin-out retention
◆ High speed
   — 5.0ns tPD Commercial and 7.5ns tPD Industrial
   — 182MHz fCNT
◆ 32 to 512 macrocells; 32 to 768 registers
◆ 44 to 388 pins in PLCC, PQFP, TQFP, BGA, fpBGA and caBGA packages
◆ Flexible architecture for a wide range of design styles
   — D/T registers and latches
   — Synchronous or asynchronous mode
   — Dedicated input registers
   — Programmable polarity
   — Reset/ preset swapping
◆ Advanced capabilities for easy system integration
   — 3.3-V & 5-V JEDEC-compliant operations
   — JTAG (IEEE 1149.1) compliant for boundary scan testing
   — 3.3-V & 5-V JTAG in-system programming
   — PCI compliant (-5/-55/-6/-65/-7/-10/-12 speed grades)
   — Safe for mixed supply voltage system designs
   — Programmable pull-up or Bus-FriendlyTM inputs and I/Os
   — Hot-socketing
   — Programmable security bit
   — Individual output slew rate control
◆ Advanced E2CMOS process provides high-performance, cost-effective solutions
◆ Supported by ispDesignEXPERTTM software for rapid logic development
   — Supports HDL design methodologies with results optimized for ispMACH 4A
   — Flexibility to adapt to user requirements
   — Software partnerships that ensure customer success
◆ Lattice and third-party hardware programming support
   — LatticePROTM software for in-system programmability support on PCs
         and automated test equipment
   — Programming support on all major programmers including Data I/O, BP Microsystems,
         Advin, and System General

Description : C-Band DWDM DFB Laser Component

C-Band DWDM DFB Laser Component

The 1754C laser component is a Dense Wavelength Division Multiplexing (DWDM) laser for analog CATV applications. It features a distributed-feedback (DFB) device that has been designed specifically for radio frequency (RF) and CATV applications. The 1754C laser component has a wide temperature range for reliable performance in harsh node environments and narrow transmitter designs. It also features low adiabatic chirp to maximize signal quality in short and long lengths of fiber. The laser’s excellent inherent linearity minimizes degradation of the broadcast signals caused by quadrature amplitude modulated (QAM) channels.
The 1754C is available in all C-band ITU grid wavelengths.

Features
■ Standard ITU Grid Wavelengths
■ Advanced Analog Chip Design
■ Reduced Equipment Requirements in the Hub
■ OC-48 Pin Out
■ Telcordia Technologies™ 468 Compliant
■ Wide Temperature Range – Stable Even in Harsh Environments
■ RoHS Compliant

Applications
■ CATV Broadcast Networks
■ Networks with Limited Fiber
■ Archtectures Using Separate Optical Wavelengths to Carry Targeted Services

Description : IDC SOCKET (DUAL BEAM)

IDC SOCKET (DUAL BEAM)

Description : High Performance E2CMOS® In-System Programmable Logic

GENERAL DESCRIPTION
The ispMACH™ 4A family from Lattice offers an exceptionally flexible architecture and delivers a superior Complex Programmable Logic Device (CPLD) solution of easy-to-use silicon products and software tools. The overall benefits for users are a guaranteed and predictable CPLD solution, faster time-to-market, greater flexibility and lower cost. The ispMACH 4A devices offer densities ranging from 32 to 512 macrocells with 100% utilization and 100% pin-out retention. The ispMACH 4A families offer 5-V (M4A5-xxx) and 3.3-V (M4A3-xxx) operation.

FEATURES
◆ High-performance, E2CMOS 3.3-V & 5-V CPLD families
◆ Flexible architecture for rapid logic designs
   — Excellent First-Time-FitTM and refit feature
   — SpeedLockingTM performance for guaranteed fixed timing
   — Central, input and output switch matrices for 100% routability and 100% pin-out retention
◆ High speed
   — 5.0ns tPD Commercial and 7.5ns tPD Industrial
   — 182MHz fCNT
◆ 32 to 512 macrocells; 32 to 768 registers
◆ 44 to 388 pins in PLCC, PQFP, TQFP, BGA, fpBGA and caBGA packages
◆ Flexible architecture for a wide range of design styles
   — D/T registers and latches
   — Synchronous or asynchronous mode
   — Dedicated input registers
   — Programmable polarity
   — Reset/ preset swapping
◆ Advanced capabilities for easy system integration
   — 3.3-V & 5-V JEDEC-compliant operations
   — JTAG (IEEE 1149.1) compliant for boundary scan testing
   — 3.3-V & 5-V JTAG in-system programming
   — PCI compliant (-5/-55/-6/-65/-7/-10/-12 speed grades)
   — Safe for mixed supply voltage system designs
   — Programmable pull-up or Bus-FriendlyTM inputs and I/Os
   — Hot-socketing
   — Programmable security bit
   — Individual output slew rate control
◆ Advanced E2CMOS process provides high-performance, cost-effective solutions
◆ Supported by ispDesignEXPERTTM software for rapid logic development
   — Supports HDL design methodologies with results optimized for ispMACH 4A
   — Flexibility to adapt to user requirements
   — Software partnerships that ensure customer success
◆ Lattice and third-party hardware programming support
   — LatticePROTM software for in-system programmability support on PCs
         and automated test equipment
   — Programming support on all major programmers including Data I/O, BP Microsystems,
         Advin, and System General

Description : WS Series Hot-Molded Carbon Composition Potentiometer

Features
■ Carbon composition/Industrial/Sealed
■ Locking-Bushing/Standard-Bushing
■ Meet MIL-R-94

Description : WS Series Hot-Molded Carbon Composition Potentiometer

[Sharma]

Features
■ Carbon composition/Industrial/Sealed
■ Locking-Bushing/Standard-Bushing
■ Meet MIL-R-94

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