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Description : MIL-STD-1553B NOTICE 2 ADVANCED INTEGRATED MUX HYBRIDS WITH ENHANCED RT FEATURES (AIM-HY’er)

DESCRIPTION
DDC’s Bus-61559 series of Advanced Integrated Mux Hybrids with enhanced RT Features (AIM-HY’er) comprise a complete interface between a micro processor and a MIL-STD-1553B Notice 2 Bus, implementing Bus Controller (BC), Remote Terminal (RX, and Monitor Terminal (MT) modes. Packaged in a single 78-pin DIP or 82-pin flat package the Bus-61559 series contains dual low-power Transceivers and encoder/decoders, complete BC/RT/MT protocol logic, memory management and interrupt logic, 8K x 16 of shared static RAM, and a direct, buffered interface to a host processor Bus.

FEATURES
• Complete Integrated 1553B Notice 2 Interface Terminal
• Functlonal Superset of Bus- 61553 AlM-HYSeries
• Internal Address and Data Buffers for Dlrect Interface to Processor Bus
• RT Subaddress Circular Buffers to Support Bulk Data Transfers
• Optlonal Separatlon of RT Broadcast Data
• Internal Interrupt Status and Time Tag Registers
• Internal ST Command Illegalization
• MIL-PRF-38534 Processing Available

Philips Electronics
Philips Electronics
Description : Transceivers

74F641 Octal Bus Transceiver with Common Output Enable, Non-Inverting (Open Collector)
74F642 Octal Bus Transceiver with Common Output Enable, Inverting (Open Collector)

FEATURES
• High-impedance NPN base inputs for reduced loading
   (20µA in High and Low states)
Octal bidirectional Bus interface
• Common Output Enable for both Transmit and Receive modes
• Open collector outputs sink 64mA
• —74F641, non-inverting
   —74F642, inverting

Motorola => Freescale
Motorola => Freescale
Description : BIDIRECTIONAL INSTRUMENTATION Bus(GPIB) Transceiver

Octal BIDIRECTIONAL Bus Transceiver WITH TERMINATION NETWORKS
SILICON MONOLITHIC INTEGRATED CIRCUIT

Description : MIL-STD-1553B NOTICE 2 ADVANCED INTEGRATED MUX HYBRIDS WITH ENHANCED RT FEATURES (AIM-HY’er)

[Data Device Corporation]

DESCRIPTION
DDC’s Bus-61559 series of Advanced Integrated Mux Hybrids with enhanced RT Features (AIM-HY’er) comprise a complete interface between a micro processor and a MIL-STD-1553B Notice 2 Bus, implementing Bus Controller (BC), Remote Terminal (RX, and Monitor Terminal (MT) modes. Packaged in a single 78-pin DIP or 82-pin flat package the Bus-61559 series contains dual low-power Transceivers and encoder/decoders, complete BC/RT/MT protocol logic, memory management and interrupt logic, 8K x 16 of shared static RAM, and a direct, buffered interface to a host processor Bus.

FEATURES
• Complete Integrated 1553B Notice 2 Interface Terminal
• Functlonal Superset of Bus- 61553 AlM-HYSeries
• Internal Address and Data Buffers for Dlrect Interface to Processor Bus
• RT Subaddress Circular Buffers to Support Bulk Data Transfers
• Optlonal Separatlon of RT Broadcast Data
• Internal Interrupt Status and Time Tag Registers
• Internal ST Command Illegalization
• MIL-PRF-38534 Processing Available

Philips Electronics
Philips Electronics
Description : Octal Bus Transceiver, non-inverting (open collector)

DESCRIPTION
The 74F621 is an Octal Transceiver featuring non-inverting open collector Bus-compatible outputs in both send and receive directions. The outputs are capable of sinking 64mA, providing very good capacitive drive characteristics.
This Octal Bus Transceiver is designed for asynchronous two-way communication between data Buses. The control function implementation allows for maximum flexibility in timing.

FEATURES
• High-impedance NPN base inputs for reduced loading (20µA in High and Low states)
Octal bidirectional Bus interface
• Open collector outputs sink 64mA
• Non-inverting

Description : Octal Bidirectional Transceiver with 3-State Outputs

Octal Bidirectional Transceiver with 3-State Outputs

The MC74AC623/74ACT623 Octal Bus Transceiver is designed for asynchronous two-way communication between data Buses. The device transmits data from Bus A to Bus B when T/R = HIGH, or from Bus B to Bus A when T/R = LOW. The enable input can be used to disable the device so the Buses are effectively isolated.

• Bidirectional Data Path
• A and B Outputs Sink 24 mA/Source –24 mA
• ′ACT623 Has TTL Compatible Inputs

Description : Octal Bidirectional Transceiver with 3-State Outputs

Octal Bidirectional Transceiver with 3-State Outputs

The MC74AC643/74ACT643 Octal Bus Transceiver is designed for asynchronous two-way communication between data Buses. The device transmits data from Bus A to Bus B when T/R = HIGH, or from Bus B to Bus A when T/R = LOW. The enable input can be used to disable the device so the Buses are effectively isolated.

• Bidirectional Data Path
• A and B Outputs Sink 24 mA/Source –24 mA
• ′ACT643 Has TTL Compatible Inputs

System Logic Semiconductor
System Logic Semiconductor
Description : Octal 3-State Noninverting Bus Transceiver

Octal 3-State Noninverting Bus Transceiver

These Octal Bus Transceiver are designed for asynchronous two way communication between data Buses. The control function implementation minimized external timing requirements.
The device allows data transmission from the A Bus to the B Bus or from the B Bus to the A Bus depending upon the logic level at the directional control (DIR) input. The enable input(E) can be used to disable the device so that the Buses are effectively isolated.

• Bidirectional Bus Transceiver in a High-Density 20-Pin Package
• 3-state Outputs Dirve Bus Lines Directly
• P-N-P Inputs D-C Loading on Bus Lines
• Hysteresis at Bus Inputs Improve Noise Margins
• Typical Propagation Delay Times; Port to Port ... 8 ns

Integral Corp.
Integral Corp.
Description : Octal 3-State Noninverting Bus Transceiver

Octal 3-State Noninverting Bus Transceiver

These Octal Bus Transceiver are designed for asynchronous two-way communication between data Buses. The control function implementation minimized external timing requirements.
The device allows data transmission from the A Bus to the B Bus or from the B Bus to the A Bus depending upon the logic level at the directional control (DIR) input. The enable input(E) can be used to disable the device so that the Buses are effectively isolated.

• Bidirectional Bus Transceiver in a High-Density 20-Pin Package
• 3-state Outputs Dirve Bus Lines Directly
• P-N-P Inputs D-C Loading on Bus Lines
• Hysteresis at Bus Inputs Improve Noise Margins
• Typical Propagation Delay Times; Port to Port ... 8 ns

System Logic Semiconductor
System Logic Semiconductor
Description : Octal 3-State Noninverting Bus Transceiver

Octal 3-State Noninverting Bus Transceiver

These Octal Bus Transceiver are designed for asynchronous twoway communication between data Buses. The control function implementation minimized external timing requirements.
The device allows data transmission from the A Bus to the B Bus or from the B Bus to the A Bus depending upon the logic level at the directional control (DIR) input. The enable input(E) can be used to disable the device so that the Buses are effectively isolated.

 • Bidirectional Bus Transceiver in a High-Density 20-Pin Package
 • 3-state Outputs Dirve Bus Lines Directly
 • P-N-P Inputs D-C Loading on Bus Lines
 • Hysteresis at Bus Inputs Improve Noise Margins
 • Typical Propagation Delay Times; Port to Port ... 8 ns

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