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Part Name(s) : ADSP-21364BBC-1AA
ADI
Analog Devices
Description : SHARC® Processor

GENERAL DESCRIPTION
The ADSP-2136x SHARC Processor is a member of the SIMD SHARC family of DSPs that feature Analog Devices’ Super Harvard Architecture. The Processor is source code-compatible with the ADSP-2126x and ADSP-2116x DSPs, as well as with first generation ADSP-2106x SHARC Processors in SISD (single-instruction, single-data) mode. The ADSP-2136x is a 32-bit/40-bit floating-point Processor optimized for high performance automotive audio applications with a large onchip SRAM and ROM, multiple internal buses to eliminate I/O bottlenecks, and an innovative digital audio interface (DAI).

SUMMARY
   High performance, 32-bit/40-bit, floating-point Processor
      optimized for high performance processing
   Single-instruction, multiple-data (SIMD) computational
      architecture
   On-chip memory—3M bit of on-chip SRAM
   Code compatible with all other members of the SHARC family
   The ADSP-2136x Processors are available with a 333 MHz
      core instruction rate and unique peripherals such as the
      digital audio interface, S/PDIF transceiver, DTCP (digital
      transmission content protection protocol), serial ports,
      8-channel asynchronous sample rate converter, precision
      clock generators, and more. For complete ordering information,
      see Ordering Guide on Page 52.

Part Name(s) : ADSP-21371KSZ-ENG
ADI
Analog Devices
Description : SHARC® Processor

GENERAL DESCRIPTION
The ADSP-21371 SHARC Processor is a member of the SIMD SHARC family of DSPs that feature Analog Devices Super Harvard Architecture. The ADSP-21371 is source code compatible with the ADSP-2126x, ADSP-2136x, and ADSP-2116x DSPs as well as with first generation ADSP-2106x SHARC Processors in SISD (single-instruction, single-data) mode. The ADSP-21371 is a 32-bit/40-bit floating point Processors optimized for high performance automotive audio applications with its large onchip SRAM and mask-programmable ROM, multiple internal buses to eliminate I/O bottlenecks, and an innovative digital applications interface (DAI).

SUMMARY
   High performance 32-bit/40-bit floating point Processor
      optimized for high performance audio processing
   Single-instruction, multiple-data (SIMD) computational
      architecture
   On-chip memory—1M bit of on-chip SRAM and a dedicated
      4M bit of on-chip mask-programmable ROM
   Code compatible with all other members of the SHARC family
   The ADSP-21371 is available with a 266 MHz core instruction
      rate with unique audio centric peripherals such as the
      digital applications interface, serial ports, precision clock
      generators and more. For complete ordering information,
   see Ordering Guide on Page 47

Part Name(s) : ADSP-21261SKBC-150
ADI
Analog Devices
Description : SHARC® Embedded Processor

GENERAL DESCRIPTION
The ADSP-21261 SHARC DSP is a member of the SIMD SHARC family of DSPs featuring Analog Devices Super Harvard Architecture. The ADSP-21261 is source code compatible with the ADSP-2126x, ADSP-21160, and ADSP-21161 DSPs, as well as with first generation ADSP-2106x SHARC Processors in SISD (single-instruction, single-data) mode. Like other SHARC DSPs, the ADSP-21261 is a 32-bit/40-bit floating-point Processor optimized for high performance signal processing applications with its dual-ported on-chip SRAM, mask-programmable ROM, multiple internal buses to eliminate I/O bottlenecks, and an innovative digital applications interface.

SUMMARY
   High performance 32-bit/40-bit floating-point Processor
   Code compatibility—at assembly level, uses the same
      instruction set as other SHARC DSPs
   Single-instruction multiple-data (SIMD) computational
      architecture—two 32-bit IEEE floating-point/32-bit fixed-point/
      40-bit extended precision floating-point computational
      units, each with a multiplier, ALU, shifter, and register file
   High bandwidth I/O—a parallel port, an SPI® port, four serial
      ports, a digital applications interface (DAI), and JTAG
   DAI incorporates two precision clock generators (PCGs), an
      input data port (IDP) that includes a parallel data
      acquisition port (PDAP), and three programmable timers, all
      under software control by the signal routing unit (SRU)
   On-chip memory—1M bit of on-chip SRAM and a dedicated
      3M bit of on-chip mask-programmable ROM
   The ADSP-21261 is available in commercial and industrial
      temperature grades. For complete ordering information,
      see Ordering Guide on Page 44.

ADI
Analog Devices
Description : SHARC® Processor

GENERAL DESCRIPTION
The ADSP-21375 SHARC Processor is a members of the SIMD SHARC family of DSPs that feature Analog Devices Super Harvard Architecture. The ADSP-21375 is source code compatible with the ADSP-2126x, ADSP-2136x, and ADSP-2116x DSPs as well as with first generation ADSP-2106x SHARC Processors in SISD (single-instruction, single-data) mode. The ADSP-21375 is a 32-bit/40-bit floating point Processors optimized for high performance automotive audio applications with its large on-chip SRAM and mask-programmable ROM, multiple internal buses to eliminate I/O bottlenecks, and an innovative digital applications interface (DAI).

SUMMARY
   High performance 32-bit/40-bit floating point Processor
      optimized for high performance audio processing
   Single-instruction, multiple-data (SIMD) computational
      architecture
   On-chip memory—0.5M bit of on-chip SRAM and a dedicated
      2M bit of on-chip mask-programmable ROM
   Code compatible with all other members of the SHARC family
   The ADSP-21375 is available with a 266 MHz core instruction
      rate with unique audio centric peripherals such as the
      digital applications interface, serial ports, precision clock
      generators and more. For complete ordering information,
      see Ordering Guide on Page 42

Description : SHARC® Processor

GENERAL DESCRIPTION
The ADSP-2136x SHARC Processor is a member of the SIMD SHARC family of DSPs that feature Analog Devices’ Super Harvard Architecture. The Processor is source code-compatible with the ADSP-2126x and ADSP-2116x DSPs, as well as with first generation ADSP-2106x SHARC Processors in SISD (single-instruction, single-data) mode. The ADSP-2136x is a 32-bit/40-bit floating-point Processor optimized for high performance automotive audio applications with a large onchip SRAM and ROM, multiple internal buses to eliminate I/O bottlenecks, and an innovative digital audio interface (DAI).

SUMMARY
   High performance, 32-bit/40-bit, floating-point Processor
      optimized for high performance processing
   Single-instruction, multiple-data (SIMD) computational
      architecture
   On-chip memory—3M bit of on-chip SRAM
   Code compatible with all other members of the SHARC family
   The ADSP-2136x Processors are available with a 333 MHz
      core instruction rate and unique peripherals such as the
      digital audio interface, S/PDIF transceiver, DTCP (digital
      transmission content protection protocol), serial ports,
      8-channel asynchronous sample rate converter, precision
      clock generators, and more. For complete ordering information,
      see Ordering Guide on Page 52.

Description : SHARC® Processor

GENERAL DESCRIPTION
The ADSP-2136x SHARC Processor is a member of the SIMD SHARC family of DSPs that feature Analog Devices’ Super Harvard Architecture. The Processor is source code-compatible with the ADSP-2126x and ADSP-2116x DSPs, as well as with first generation ADSP-2106x SHARC Processors in SISD (single-instruction, single-data) mode. The ADSP-2136x is a 32-bit/40-bit floating-point Processor optimized for high performance automotive audio applications with a large onchip SRAM and ROM, multiple internal buses to eliminate I/O bottlenecks, and an innovative digital audio interface (DAI).

SUMMARY
   High performance, 32-bit/40-bit, floating-point Processor
      optimized for high performance processing
   Single-instruction, multiple-data (SIMD) computational
      architecture
   On-chip memory—3M bit of on-chip SRAM
   Code compatible with all other members of the SHARC family
   The ADSP-2136x Processors are available with a 333 MHz
   core instruction rate and unique peripherals such as the digital
   audio interface, S/PDIF transceiver, DTCP (digital
   transmission content protection protocol), serial ports,
   8-channel asynchronous sample rate converter, precision
   clock generators, and more. For complete ordering information,
   see Ordering Guide on Page 52.

Description : SHARC® Processor

GENERAL DESCRIPTION
The ADSP-21363 SHARC Processor is a member of the SIMD SHARC family of DSPs that feature Analog Devices Super Harvard Architecture. The ADSP-21363 is source code compatible with the ADSP-2126x, and ADSP-2116x DSPs as well as with first generation ADSP-2106x SHARC Processors in SISD (Single-Instruction, Single-Data) mode. The ADSP-21363 is a 32- bit/40-bit floating point Processor optimized for professional audio applications with a large on-chip SRAM, multiple internal buses to eliminate I/O bottlenecks, and an innovative Digital Audio Interface (DAI).

SUMMARY
   High performance 32-bit/40-bit floating point Processor
      optimized for professional audio processing
   At 333 MHz/2 GFLOPs, with unique audio centric peripherals
      such as the Digital Audio Interface the ADSP-21363 SHARC
      Processor is ideal for applications that require industry
      leading equalization, reverberation and other effects
      processing
   Single-Instruction Multiple-Data (SIMD) computational
      architecture
      Two 32-bit IEEE floating-point/32-bit fixed-point/40-bit
      extended precision floating-point computational units,
      each with a multiplier, ALU, shifter, and register file
   On-chip memory—3M bit of on-chip SRAM and a dedicated
      4M bit of on-chip mask-programmable ROM
   Code compatible with all other members of the SHARC family
   The ADSP-21363 is available with a 333 MHz core instruction
      rate. For complete ordering information, see Ordering
      Guide on Page 44

ADI
Analog Devices
Description : SHARC Processor

GENERAL DESCRIPTION
The ADSP-21469 SHARC® Processor is a member of the SIMD SHARC family of DSPs that feature Analog Devices Super Harvard Architecture. The ADSP-21469 is source code compatible with the ADSP-2126x, ADSP-2136x, ADSP-2137x, and ADSP- 2116x DSPs as well as with first generation ADSP-2106x SHARC Processors in SISD (single-instruction, single-data) mode. The ADSP-21469 is a 32-bit/40-bit floating point Processors optimized for high performance audio applications with its large on-chip SRAM, multiple internal buses to eliminate I/O bottlenecks, and an innovative digital applications interface (DAI).

SUMMARY
   Note: This datasheet is preliminary. This document contains
      material that is subject to change without notice.
   High performance 32-bit/40-bit floating point Processor
      optimized for high performance audio processing
   Single-instruction, multiple-data (SIMD) computational
      architecture
   On-chip memory—5 Mbits of on-chip RAM
   Code compatible with all other members of the SHARC family
   The ADSP-21469 is available with a 450 MHz core instruction
      rate with unique audiocentric peripherals such as the
      digital applications interface, serial ports, precision clock
      generators, S/PDIF transceiver, asynchronous sample rate
      converters, input data port, and more.
      For complete ordering information, see Ordering Guide on
      Page 56.

Description : SHARC® Processor

GENERAL DESCRIPTION
The ADSP-21368 SHARC Processor is a members of the SIMD SHARC family of DSPs that feature Analog Devices Super Harvard Architecture. The ADSP-21368 is source code compatible with the ADSP-2126x, and ADSP-2116x, DSPs as well as with first generation ADSP-2106x SHARC Processors in SISD (Single-Instruction, Single-Data) mode. The ADSP-21368 is a 32- bit/40-bit floating point Processors optimized for high performance automotive audio applications with its large on-chip SRAM and mask-programmable ROM, multiple internal buses to eliminate I/O bottlenecks, and an innovative Digital Audio Interface (DAI).

SUMMARY
   High performance 32-bit/40-bit floating point Processor
      optimized for high performance automotive audio
      processing
   Audio decoder and post Processor-algorithm support with
      32-bit floating-point implementations
      Non-volatile memory may be configured to support audio
      decoders and post Processor-algorithms like PCM, Dolby
      Digital EX, Dolby Prologic IIx, Dolby Digital Plus, Dolby
      headphone, DTS 96/24, Neo:6, DTS ES, DTS Lossless,
      MPEG2 AAC, MPEG2 2channel, MP3, WMAPro, and
      Multi-channel encoder. Functions like Bass management, Delay,
      Speaker equalization, Graphic equalization,
      Decoder/post-Processor algorithm combination support will vary
      depending upon the chip version and the system
      configurations. Please visit www.analog.com
   Single-Instruction Multiple-Data (SIMD) computational
      architecture
   On-chip memory—2M bit of on-chip SRAM and a dedicated
      6M bit of on-chip mask-programmable ROM
   Code compatible with all other members of the SHARC family
   The ADSP-21368 is available with a 400 MHz core instruction
      rate with unique audio centric peripherals such as the
      Digital Audio Interface, S/PDIF transceiver, serial ports,
      8-channel asynchronous sample rate converter, precision
      clock generators and more. For complete ordering
      information, see Ordering Guide on page 46

ADI
Analog Devices
Description : SHARC® Processor

GENERAL DESCRIPTION
The ADSP-21267 SHARC DSP is a member of the SIMD SHARC family of DSPs featuring Analog Devices Super Harvard Architecture. The ADSP-21267 is source code compatible with the ADSP-2136x, and ADSP-2116x DSPs as well as with first generation ADSP-2106x SHARC Processors in SISD (Single-Instruction, Single-Data) mode. Like other SHARC DSPs, the ADSP-21267 is a 32-bit/40-bit floating-point Processor optimized for high performance audio applications with its dualported on-chip SRAM, mask-programmable ROM, multiple internal buses to eliminate I/O bottlenecks, and an innovative Digital Audio Interface (DAI).

SUMMARY
    High performance 32-bit/40-bit floating point Processor
        optimized for high performance audio processing
    Code compatible with all other SHARC DSPs
    The ADSP-21267 processes high performance audio while
        enabling low system costs
    Audio decoders and post Processor-algorithms support.
        Non-volatile memory can be configured to contain a
        combination of PCM 96 kHz, Dolby Digital, Dolby Digital EX2,
        Dolby Pro Logic IIx, DTS 5.1, DTS ES Discrete 6.1, DTS-ES
        Matrix 6.1, DTS Neo:6, MPEG2x BC (2 channel) and others.
        See SHARC">www.analog.com/SHARC for a complete list
    Single-Instruction Multiple-Data (SIMD) computational
        architecture—two 32-bit IEEE floating-point/32-bit fixed-point/
        40-bit extended precision floating point computational
        units, each with a multiplier, ALU, shifter, and register file
    High bandwidth I/O —a parallel port, an SPI port, four serial
        ports, a digital audio interface (DAI) and JTAG test port
    DAI incorporates two precision clock generators (PCG), and
        an input data port (IDP) that includes a parallel data
        acquisition port (PDAP), and three programmable timers, all
        under software control by the signal routing unit (SRU)
    On-chip memory—1M Bit of on-chip SRAM and a dedicated
        3M Bits of on-chip mask-programmable ROM
    The ADSP-21267 is available with a 150 MHz core instruction
        rate. For complete ordering information, see Ordering
        Guide on page 43

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