24FC32T-IP View Datasheet(PDF) - Microchip Technology
Part Name
Description
MFG CO.
'24FC32T-IP' PDF : 12 Pages View PDF
24FC32
TABLE 1-3: AC CHARACTERISTICS
Parameter
Symbol
1 MHz Bus
Min
Max
Units
Remarks
Clock frequency
FCLK
0
1000
kHz
Clock high time
THIGH
500
—
ns
Clock low time
TLOW
500
—
ns
SDA and SCL rise time
TR
—
300
ns (Note 1)
SDA and SCL fall time
TF
—
100
ns (Note 1)
START condition hold time THD:STA 250
—
ns After this period the first clock pulse is generated
START condition setup time TSU:STA 250
—
ns Only relevant for repeated START condition
Data input hold time
THD:DAT
0
—
ns
Data input setup time
TSU:DAT 100
—
ns
STOP condition setup time TSU:STO 250
—
ns
Output valid from clock
TAA
—
350
ns (Note 2)
Bus free time
TBUF
500
—
ns Time the bus must be free before a new trans-
mission can start
Write cycle time
TWR
—
5
ms/page Note 3
Endurance
High Endurance Block
—
10M
—
10M 25°C, Vcc = 5.0V, Block Mode (Note 4)
Rest of Array
—
1M
—
1M
Note 1: Not 100 percent tested.
2: As a transmitter, the device must provide an internal minimum delay time to bridge the undefined region
(minimum 100 ns) of the falling edge of SCL to avoid unintended generation of START or STOP conditions.
3: The times shown are for a single page of 8 bytes. Multiply by the number of pages loaded into the write
cache for total time.
4: This parameter is not tested but guaranteed by characterization. For endurance estimates in a specific appli-
cation, please consult the Total Endurance Model which can be obtained on our BBS or website.
FIGURE 1-2: BUS TIMING DATA
TF
SCL
TSU:STA
SDA
IN
SDA
OUT
TSP
TAA
TLOW
THD:STA
THIGH
THD:DAT
TAA
TR
TSU:DAT TSU:STO
TBUF
© 1996 Microchip Technology Inc.
DS21126B-page 3-3
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