4370 View Datasheet(PDF) - Linear Technology
Part Name
Description
MFG CO.
'4370' PDF : 20 Pages View PDF
LTC4370
Applications Information
In Figure 2b, 0.5IL • RDS(ON) is 125mV. The higher RDS(ON)
rails the servo amplifier high as it cannot regulate the 25mV
VFR(MIN) across the lower supply’s MOSFET. Compared
to Figure 2a, the sharing capture range shrinks by 100mV
(125mV – 25mV) to ±400mV. However, the ΔVIN over
which currents are shared partially stays the same at
500mV + IL • RS. Even when not maximizing sharing range,
IL • RDS(ON) should be kept below 75mV for optimum
performance.
The peak power dissipation in the MOSFET occurs when
the entire load current is being sourced by one supply
with the maximum forward regulation voltage dropped
across the MOSFET (as shown in Figure 2a). Therefore,
the PD(MAX) rating of the MOSFET should satisfy:
PD(MAX) ≥ IL • VFR(MAX)
(3)
Table 1 provides starting guidelines for the type of
MOSFET package and heat sink required at various levels
of power dissipation. These are typical ranges for a room
temperature ambient with no air flow.
Table 1. Guidelines for MOSFET Power Dissipation
MAXIMUM POWER
DISSIPATED
MOSFET PACKAGE
HEAT SINK
0.5W to 1W
SO-8
PCB
1W to 2W
SO-8 With Exposed Pad,
PCB
D-Pak (TO-252)
TO-220
Standing in Free Air
2W to 4W
DD-Pak (TO-263), TO-220
PCB
4W to 10W
TO-220
Stamping
10W to 20W
TO-220
Casting, Extrusion
20W to 50W
TO-247, TO-3P
Extrusion
Sense Resistor Selection
The sense resistor voltage drop dictates the current sharing
accuracy. Sharing error, due to the error amplifier input
offset, decreases with increasing sense voltage as:
ΔI = |I1 – I2 | = | VEA(OS)| = 2mV
IL
IL
IL • RS IL • RS
(4)
I1 and I2 are the two supply currents, IL is the load current
(I1 + I2 = IL), RS is the sense resistor value, and VEA(OS)
is the input offset of the internal error amplifier. A 25mV
sense resistor voltage drop with half of the load cur-
rent flowing through it (i.e., IL • RS = 50mV) gives a 4%
sharing error. A larger sense resistance may also be
needed if there is a connector in between the OUT pins
and the load to minimize the effect of its resistance. At
larger sense voltages the accuracy will be limited by the
sense resistor tolerance.
If sharing accuracy requirements can be relaxed, power
dissipated in the sense resistor can be reduced by selecting
a lower resistance. Worst-case power dissipation happens
at full load, i.e., when load current is not being shared.
While reducing the sense resistance, note that the sharing
loop does not close for load currents below VEA(OS)/RS.
The two sense resistors can have different values if the
application does not require the load current to be shared
equally between the supplies. In such a case:
RS1 = I2
RS2 I1
(5)
CPO Capacitor Selection
The recommended value of the capacitor between the CPO
and VIN pins is approximately 10× the input capacitance CISS
of the MOSFET. A larger capacitor takes a correspondingly
longer time to be charged by the internal charge pump. A
smaller capacitor suffers more voltage drop during a fast
gate turn-on event as it shares charge with the MOSFET
gate capacitance.
4370f
12
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