74ABT373CSC View Datasheet(PDF) - Fairchild Semiconductor
Part Name
Description
MFG CO.
'74ABT373CSC' PDF : 13 Pages View PDF
74ABT373
Octal Transparent Latch with 3-STATE Outputs
March 2007
tm
Features
■ 3-STATE outputs for bus interfacing
■ Output sink capability of 64mA, source capability of
32mA
■ Guaranteed output skew
■ Guaranteed multiple output switching specifications
■ Output switching specified for both 50pF and 250pF
loads
■ Guaranteed simultaneous switching, noise level and
dynamic threshold performance
■ Guaranteed latchup protection
■ High-impedance, glitch-free bus loading during entire
power up and power down
■ Nondestructive, hot-insertion capability
General Description
The ABT373 consists of eight latches with 3-STATE
outputs for bus organized system applications. The flip-
flops appear transparent to the data when Latch Enable
(LE) is HIGH. When LE is LOW, the data that meets the
setup times is latched. Data appears on the bus when
the Output Enable (OE) is LOW. When OE is HIGH the
bus output is in the high impedance state.
Ordering Information
Package
Order Number Number
Package Description
74ABT373CSC
74ABT373CSJ
74ABT373CMSA
M20B
M20D
MSA20
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide
74ABT373CMTC
MTC20
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.
Pb-Free package per JEDEC J-STD-020B.
Connection Diagram
Pin Descriptions
Pin Names
Description
D0–D7
LE
Data Inputs
Latch Enable Input (Active HIGH)
OE
Output Enable Input (Active LOW)
O0–O7
3-STATE Latch Outputs
©1993 Fairchild Semiconductor Corporation
74ABT373 Rev. 1.4
www.fairchildsemi.com
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