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74ACT11 View Datasheet(PDF) - STMicroelectronics

Part Name
Description
MFG CO.
74ACT11
ST-Microelectronics
STMicroelectronics ST-Microelectronics
'74ACT11' PDF : 7 Pages View PDF
1 2 3 4 5 6 7
74ACT11
DC SPECIFICATIONS
Test Condition
Value
Symbol
Parameter
VCC
(V)
TA = 25°C
-40 to 85°C -55 to 125°C Unit
Min. Typ. Max. Min. Max. Min. Max.
VIH High Level Input
4.5
VO = 0.1 V or
2.0 1.5
2.0
2.0
Voltage
5.5
VCC-0.1V
2.0 1.5
2.0
2.0
V
VIL Low Level Input
Voltage
4.5
VO = 0.1 V or
5.5
VCC-0.1V
1.5 0.8
0.8
0.8
1.5 0.8
0.8
0.8
VOH High Level Output 4.5
IO=-50 µA
4.4 4.49
4.4
4.4
V
Voltage
5.5
IO=-50 µA
5.4 5.49
5.4
5.4
4.5
IO=-24 mA
3.86
3.76
3.7
5.5
IO=-24 mA
4.86
4.76
4.7
VOL Low Level Output 4.5
Voltage
5.5
IO=50 µA
IO=50 µA
0.001 0.1
0.1
0.1
V
0.001 0.1
0.1
0.1
4.5
IO=24 mA
0.36
0.44
0.5
5.5
IO=24 mA
0.36
0.44
0.5
II
Input Leakage Cur-
rent
5.5
VI = VCC or GND
± 0.1
±1
± 1 µA
ICCT Max ICC/Input
5.5 VI = VCC - 2.1V
0.6
1.5
1.6 mA
ICC
Quiescent Supply
Current
5.5 VI = VCC or GND
2
20
40 µA
IOLD
IOHD
Dynamic Output
Current (note 1, 2)
5.5 VOLD = 1.65 V max
VOHD = 3.85 V min
75
-75
1) Maximum test duration 2ms, one output loaded at time
2) Incident wave switching is guaranteed on transmission lines with impedances as low as 50
50 mA
-50 mA
AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, RL = 500 , Input tr = tf = 3ns)
Test Condition
Value
Symbol
Parameter
VCC
(V)
tPLH tPHL Propagation Delay
Time
5.0(*)
TA = 25°C
-40 to 85°C -55 to 125°C Unit
Min. Typ. Max. Min. Max. Min. Max.
1.5 4.5 9.5 1.0 9.5 1.0 10.5 ns
(*) Voltage range is 5.0V ± 0.5V
CAPACITIVE CHARACTERISTICS
Test Condition
Value
Symbol
Parameter
VCC
(V)
TA = 25°C
-40 to 85°C -55 to 125°C Unit
Min. Typ. Max. Min. Max. Min. Max.
CIN Input Capacitance 5.0
4.0
pF
CPD Power Dissipation
Capacitance (note 5.0
fIN = 10MHz
37
pF
1)
1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC/3 (per gate)
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