83C251SP View Datasheet(PDF) - Intel
Part Name
Description
MFG CO.
'83C251SP' PDF : 36 Pages View PDF
8XC251SA/SB/SP/SQ HIGH-PERFORMANCE CHMOS MICROCONTROLLER
5.3.2 EXTERNAL BUS CYCLES, PAGE MODE
XTAL1
ALE
RD#/PSEN#
P2
P0/A16/A17
TOSC
TLHLL†
TLLRL†
†††
TRLDV†
TRLAZ
TLHAX†
TAVLL† TLLAX
TRHDZ1
TRHDX
A15:8
TAVRL†
TAVDV1†
TAVDV2†
A7:0/A16/A17
Page Miss††
D7:0
Instruction In
D7:0
Instruction In
TAVDV3
A7:0/A16/A17
Page Hit††
† The value of this parameter depends on wait states. See the table of AC characteristics.
†† A page hit (i.e., a code fetch to the same 256-byte "page" as the previous code fetch) requires one
state (2TOSC); a page miss requires two states (4TOSC).
††† During a sequence of page hits, PSEN# remains low until the end of the last page-hit cycle.
A4213-02
Figure 10. External Bus Cycle: Code Fetch (Page Mode)
PRELIMINARY
25
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