9S12DT128DGV2 View Datasheet(PDF) - Freescale Semiconductor
Part Name
Description
MFG CO.
'9S12DT128DGV2' PDF : 142 Pages View PDF
Device User Guide — 9S12DT128DGV2/D V02.16
Pin Name Pin Name Pin Name Pin Name Pin Name Powered
Function 1 Function 2 Function 3 Function 4 Function 5 by
Internal Pull
Resistor
CTRL
Reset
State
Description
PM1
TXCAN0
TXB
—
—
VDDX
PERM/
PPSM
Disabled
Port M I/O, TX of
CAN0, RX of BDLC
PM0
RXCAN0
RXB
—
—
VDDX
PERM/
PPSM
Disabled
Port M I/O, RX of
CAN0, RX of BDLC
PP7
KWP7
PWM7
—
—
VDDX
PERP/
PPSP
Disabled
Port P I/O, Interrupt,
Channel 7 of PWM
PP6
KWP6
PWM6
—
—
VDDX
PERP/
PPSP
Disabled
Port P I/O, Interrupt,
Channel 6 of PWM
PP5
KWP5
PWM5
—
—
VDDX
PERP/
PPSP
Disabled
Port P I/O, Interrupt,
Channel 5 of PWM
PP4
KWP4
PWM4
—
—
VDDX
PERP/
PPSP
Disabled
Port P I/O, Interrupt,
Channel 4 of PWM
PP3
KWP3
PWM3
SS1
—
VDDX
PERP/
PPSP
Port P I/O, Interrupt,
Disabled Channel 3 of PWM,
SS of SPI1
PP2
KWP2
PWM2
SCK1
—
VDDX
PERP/
PPSP
Port P I/O, Interrupt,
Disabled Channel 2 of PWM,
SCK of SPI1
PP1
KWP1
PWM1
MOSI1
—
VDDX
PERP/
PPSP
Port P I/O, Interrupt,
Disabled Channel 1 of PWM,
MOSI of SPI1
PP0
KWP0
PWM0
MISO1
—
VDDX
PERP/
PPSP
Port P I/O, Interrupt,
Disabled Channel 0 of PWM,
MISO2 of SPI1
PS7
SS0
—
—
—
VDDX
PERS/
PPSS
Up
Port S I/O, SS of
SPI0
PS6
SCK0
—
—
—
VDDX
PERS/
PPSS
Up
Port S I/O, SCK of
SPI0
PS5
MOSI0
—
—
—
VDDX
PERS/
PPSS
Up
Port S I/O, MOSI of
SPI0
PS4
MISO0
—
—
—
VDDX
PERS/
PPSS
Up
Port S I/O, MISO of
SPI0
PS3
TXD1
—
—
—
VDDX
PERS/
PPSS
Up
Port S I/O, TXD of
SCI1
PS2
RXD1
—
—
—
VDDX
PERS/
PPSS
Up
Port S I/O, RXD of
SCI1
PS1
TXD0
—
—
—
VDDX
PERS/
PPSS
Up
Port S I/O, TXD of
SCI0
PS0
RXD0
—
—
—
VDDX
PERS/
PPSS
Up
Port S I/O, RXD of
SCI0
PT[7:0]
IOC[7:0]
—
—
—
VDDX
PERT/
PPST
Disabled
Port T I/O, Timer
channels
NOTES:
1. Refer to PEAR register description in HCS12 Multiplexed External Bus Interface (MEBI) Block Guide.
Freescale Semiconductor
63
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