9S12HY48 View Datasheet(PDF) - Freescale Semiconductor
Part Name
Description
MFG CO.
'9S12HY48' PDF : 790 Pages View PDF
Port Integration Module (S12HYPIMV1)
Table 2-24. PPSS Register Field Descriptions
Field
7-0
PPSS
Description
Port S pull device select—Determine pull device polarity on input pins
This register selects whether a pull-down or a pull-up device is connected to the pin.
1 A rising edge on the associated Port S pin sets the associated flag bit in the PIFS register. A pull-down device is
connected to the associated pin, if enabled and if the pin is used as input.
0 A falling edge on the associated Port S pin sets the associated flag bit in the PIFS register. A pull-up device is
connected to the associated pin, if enabled and if the pin is used as input.
2.3.28 Port S Wired-Or Mode Register (WOMS)
Address 0x024E
R
W
Reset
7
WOMS7
0
1 Read: Anytime.
Write: Anytime.
6
WOMS6
5
WOMS5
4
WOMS4
3
WOMS3
2
WOMS2
0
0
0
0
0
Figure 2-26. Port S Wired-Or Mode Register (WOMS)
Access: User read/write1
1
0
WOMS1
WOMS0
0
0
Table 2-25. WOMS Register Field Descriptions
Field
Description
7-0
WOMS
Port S wired-or mode—Enable wired-or functionality
This register configures the output pins as wired-or. If enabled the output is driven active low only (open-drain). A
logic level of “1” is not driven.This allows a multipoint connection of several serial modules. These bits have no
influence on pins used as inputs.
1 Output buffers operate as open-drain outputs.
0 Output buffers operate as push-pull outputs.
2.3.29 Port S Routing Register (PTSRR)
Address 0x024F
7
R
0
W
Reset
0
1 Read: Anytime.
Write: Anytime.
6
5
4
3
2
0
0
0
PTSRR5
PTSRR4
0
0
0
0
0
Figure 2-27. Port S Routing Register (PTSRR)
This register configures the re-routing of IIC and SPI on alternative ports.
Access: User read/write1
1
0
PTSRR1 PTSRR0
0
0
MC9S12HY/HA-Family Reference Manual, Rev. 1.02
90
Freescale Semiconductor
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