9S12XDP512 View Datasheet(PDF) - Freescale Semiconductor
Part Name
Description
MFG CO.
'9S12XDP512' PDF : 1348 Pages View PDF
Chapter 2 Clocks and Reset Generator (S12CRGV6)
2.3.2.10
Reserved Register (FORBYP)
NOTE
This reserved register is designed for factory test purposes only, and is not
intended for general user access. Writing to this register when in special
modes can alter the CRG’s functionality.
7
6
5
4
3
2
1
0
R
0
0
0
0
0
0
0
0
W
Reset
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 2-13. Reserved Register (FORBYP)
Read: Always read 0x_00 except in special modes
Write: Only in special modes
2.3.2.11
Reserved Register (CTCTL)
NOTE
This reserved register is designed for factory test purposes only, and is not
intended for general user access. Writing to this register when in special test
modes can alter the CRG’s functionality.
7
6
5
4
3
2
1
0
R
1
0
0
0
0
0
0
0
W
Reset
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 2-14. Reserved Register (CTCTL)
Read: always read 0x_80 except in special modes
Write: only in special modes
MC9S12XDP512 Data Sheet, Rev. 2.21
96
Freescale Semiconductor
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