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A2550KLPTR View Datasheet(PDF) - Allegro MicroSystems

Part Name
Description
MFG CO.
'A2550KLPTR' PDF : 15 Pages View PDF
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A2550
Relay Driver with 5 V Regulator
for Automotive Applications
A more rigorous derivation, including RCOIL during the
exponential current decay results in:
i(t) =
Vdc
RCOIL
VCL
RCOIL
⎡⎣⎢⎢1exp ⎝⎛t
RCOIL
LCOIL
⎤⎥
⎦⎥
,
(17)
and
Δt
=
LCOIL
RCOIL
ln (1–Vdc
VCL )1 .
(18)
Energy loss in the driver is:
E=
VCL
VDC LCOIL
RC2OIL
[1+
(VCL
Vdc 1) ln (1 Vdc VCL)] .
(19)
Capacitive Loads
When capacitive loads are applied to the outputs, the
constraint described below applies. Such is the case, for
example, when capacitors are attached to the outputs to
protect against ESD. Larger capacitors protect against larger
ESD voltages. However, the upper limit on capacitance is
determined by the blanking time. The latter allows for spuri-
ous current spikes and capacitor discharges to be completed
before the overcurrent detection circuit senses the output cur-
rent (see tBLANK in the Electrical Characteristics table). The
blanking time allows a 47 nF capacitor with 20% tolerance
and nominal 12 V automotive voltages.
Pin-out Diagram
Terminal List Table
No.
Name
1
IN1
2
IN2
3
IN3
4
LGND
5
NPOR
6
WDI
7
EN
8
VREG5
9
VBB
10
ENBAT
11
CPOR
12
CWD
13
PGND
14
OUT3
15
OUT2
16
OUT1
PAD
IN1 1
IN2 2
IN3 3
LGND 4
NPOR 5
WDI 6
EN 7
VREG5 8
PAD
16 OUT1
15 OUT2
14 OUT3
13 PGND
12 CWD
11 CPOR
10 ENBAT
9 VBB
Description
Activate driver 1
Activate driver 2
Activate driver 3
Logic ground; must be connected to PGND externally
Not Power-On Reset
WatchDog Input
Enable (low voltage)
5V regulator
Supply voltage
Enable (high voltage)
Capacitor terminal for Power-On Reset cycle time
Capacitor terminal for WatchDog timing
Power ground; must be connected to LGND externally
Low side driver 3
Low side driver 2
Low side driver 1
Exposed pad for enhanced thermal performance
Allegro MicroSystems, Inc.
14
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
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