Figure 21. Serial Input Timing
S
tCHSL
C
tDVCH
DIO
tSLCH
tCHDX
MSB IN
High Impedance
DO
A25L20P/A25L10P/A25L05P Series
tCHSH
tSHSL
tSHCH
tCLCH
LSB IN
tCHCL
Figure 22. Write Protect Setup and Hold Timing during WRSR when SRWD=1
W
tWHSL
S
C
tSHWL
DIO
High Impedance
DO
(August, 2007, Version 1.0)
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AMIC Technology Corp.