A3985SLDTR-T View Datasheet(PDF) - Allegro MicroSystems
Part Name
Description
MFG CO.
'A3985SLDTR-T' PDF : 15 Pages View PDF
A3985
Digitally Programmable
Dual Full-Bridge MOSFET Driver
Functional Block Diagram
+5 V
VDD
Bandgap
VBB
Regulator
REF
VREF
SDO
6-bit
DAC
Programmable
PWM Timer
Blanking
Mixed Decay
SDI
STR
Serial Port
SCK
Phase 1
Control Logic
Phase 1
Phase 2
Control Logic
Phase 2
WC
ENABLE
OSC
Programmable
PWM Timer
Blanking
Mixed Decay
6-bit
DAC
VREF
Programmable Divider
Oscillator
Protection
UVLO
TSD
VMOTOR
VREG
CREG
Phase 1A
High-Side
Drive
VREG
Low-Side
Drive
C1A
CBOOT1A
GH1A
S1A
RGH1A
GL1A
LSS1
RGL1A
P
Bridge1
RGH1B
RGL1B
Phase 1B
Low-Side
Drive
SENSE1
GL1B
S1B
RSENSE1
P
High-Side
Drive
Phase 2A
High-Side
Drive
VREG
Low-Side
Drive
GH1B
CBOOT1B
C1B
C2A
VMOTOR
Bridge2
CBOOT2A
GH2A
S2A
RGH2A
RGH2B
GL2A
LSS2
RGL2A
RGL2B
Phase 2B
Low-Side
Drive
SENSE2
GL2B
S2B
RSENSE2
P
High-Side
Drive
GH2B
CBOOT2B
C2B
GND
Allegro MicroSystems, Inc.
3
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
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