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A43L0616AV-7 View Datasheet(PDF) - AMIC Technology

Part Name
Description
MFG CO.
A43L0616AV-7
AMICC
AMIC Technology AMICC
'A43L0616AV-7' PDF : 45 Pages View PDF
Burst Read Single Bit Write Cycle @Burst Length=2, BRSW
A43L0616A
0
CLOCK
CKE
CS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
High
RAS
CAS
ADDR
BA
A10/AP
WE
RAa
RAa
CAa RBb CAb
RBb
* Note 2
RAc CBc
CAd
RAc
DQM
DQ
(CL=2)
DQ
(CL=3)
DAa0
DAa0
QAb0 QAb1
DBc0
QAb0 QAb1
DBc0
QAd0 QAd1
QAd0 QAd1
Row Active
(A-Bank)
Row Active
(B-Bank)
Write
(A-Bank)
Read with
Auto Precharge
(A-Bank)
Row Active
(A-Bank)
Read
(A-Bank)
Write with
Auto Precharge
(B-Bank)
Precharge
(A-Bank)
: Don't care
* Note : 1. BRSW mode is enabled by setting A9 “High” at MRS (Mode Register Set).
At the BRSW Mode, the burst length at write is fixed to “1” regardless of programed burst length.
2. When BRSW write command with auto precharge is executed, keep it in mind that tRAS should not be violated.
Auto precharge is executed at the burst-end cycle, so in the case of BRSW write command,
The next cycle starts the precharge.
(May, 2001, Version 1.0)
35
AMIC Technology, Inc.
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