A4985 View Datasheet(PDF) - Allegro MicroSystems
Part Name
Description
MFG CO.
'A4985' PDF : 22 Pages View PDF
A4985
DMOS Microstepping Driver with Translator
And Overcurrent Protection
Functional Description
Device Operation. The A4985 is a complete microstepping
motor driver with a built-in translator for easy operation with
minimal control lines. It is designed to operate bipolar stepper
motors in full-, half-, quarter-, and eighth-step resolution modes.
The currents in each of the two output full-bridges and all of the
N-channel DMOS FETs are regulated with fixed off-time PWM
(pulse width modulated) control circuitry. At each step, the current
for each full-bridge is set by the value of its external current-sense
resistor (RS1 and RS2), a reference voltage (VREF), and the output
voltage of its DAC (which in turn is controlled by the output of
the translator).
At power-on or reset, the translator sets the DACs and the phase
current polarity to the initial Home state (shown in figures 8
through 11), and the current regulator to Mixed Decay Mode for
both phases. When a step command signal occurs on the STEP
input, the translator automatically sequences the DACs to the
next level and current polarity. (See table 2 for the current-level
sequence.) The microstep resolution is set by the combined effect
of the MS1 and MS2 inputs, as shown in table 1.
When stepping, if the new output levels of the DACs are lower
than their previous output levels, then the decay mode for the
active full-bridge is set to Mixed. If the new output levels of the
DACs are higher than or equal to their previous levels, then the
decay mode for the active full-bridge is set to Slow. This auto-
matic current decay selection improves microstepping perfor-
mance by reducing the distortion of the current waveform that
results from the back EMF of the motor.
Microstep Select (MS1 and MS2). The microstep resolu-
tion is set by the voltage on logic inputs MS1 and MS2, as shown
in table 1. MS1 has a 100 kΩ pull-down resistance, and MS2 has
a 50 kΩ pull-down resistance. When changing the step mode the
change does not take effect until the next STEP rising edge.
If the step mode is changed without a translator reset, and abso-
lute position must be maintained, it is important to change the
step mode at a step position that is common to both step modes in
order to avoid missing steps. When the device is powered down,
or reset due to TSD or an over current event the translator is set to
the home position which is by default common to all step modes.
Mixed Decay Operation. The bridge operates in Mixed
decay mode, at power-on and reset, and during normal running
according to the ROSC configuration and the step sequence, as
shown in figures 8 through 11. During Mixed decay, when the trip
point is reached, the A4982 initially goes into a fast decay mode
for 31.25% of the off-time, tOFF . After that, it switches to Slow
decay mode for the remainder of tOFF. A timing diagram for this
feature appears in figure 7.
Typically, mixed decay is only necessary when the current in the
winding is going from a higher value to a lower value as determined
by the translator setting. For most loads automatically-selected mixed
decay is convenient because it minimizes ripple when the current is
rising and prevents missed steps when the current is falling. For some
applications where microstepping at very low speeds is necessary,
the lack of back EMF in the winding causes the current to increase in
the load quickly, resulting in missed steps. This is shown in figure 2.
By pulling the ROSC pin to ground, mixed decay is set to be active
100% of the time, for both rising and falling currents, and prevents
missed steps as shown in figure 3. If this is not an issue, it is recom-
mended that automatically-selected mixed decay be used, because
it will produce reduced ripple currents. Refer to the Fixed Off-Time
section for details.
Low Current Microstepping. Intended for applications
where the minimum on-time prevents the output current from
regulating to the programmed current level at low current steps.
To prevent this, the device can be set to operate in Mixed decay
mode on both rising and falling portions of the current waveform.
This feature is implemented by shorting the ROSC pin to ground.
In this state, the off-time is internally set to 30 μs.
Reset Input (¯R¯¯E¯¯S¯¯E¯¯T¯). The ¯R¯¯E¯¯S¯E¯¯T¯ input sets the translator
to a predefined Home state (shown in figures 8 through 11), and
turns off all of the FET outputs. All STEP inputs are ignored until
the ¯R¯¯E¯¯S¯E¯¯T¯ input is set to high.
Step Input (STEP). A low-to-high transition on the STEP
input sequences the translator and advances the motor one incre-
ment. The translator controls the input to the DACs and the direc-
tion of current flow in each winding. The size of the increment is
determined by the combined state of the MS1and MS2 inputs.
Direction Input (DIR). This determines the direction of rota-
tion of the motor. Changes to this input do not take effect until the
next STEP rising edge.
Internal PWM Current Control. Each full-bridge is con-
trolled by a fixed off-time PWM current control circuit that limits
the load current to a desired value, ITRIP. Initially, a diagonal pair
of source and sink FET outputs are enabled and current flows
through the motor winding and the current sense resistor, RSx.
When the voltage across RSx equals the DAC output voltage, the
current sense comparator resets the PWM latch. The latch then
Allegro MicroSystems, Inc.
7
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
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