A81L801
Table 1.1 Device Bus Operations—Flash Word Mode BYTE_F = VIH
Operation
(Notes 1,2)
CE_F CE_S OE WE
A0-A18
Read from Flash
L
H
L
H
AIN
Standby
H
H
X
X
X
Output Disable
L
H
H
H
X
Write to Flash (Program/Erase)
L
H
H
L
AIN
Sector Protect
L
H
H
Sector Address,
A6=L, A1=H, A0=L
Sector Unprotect
L
H
L
L
Sector Address,
A6=L, A1=H, A0=L
Temporary Sector Unprotection
X
H
X
X
AIN
Flash Reset (Hardware) / Standby X
H
X
X
X
Boot Block Sector Write Protect
X
H
X
X
X
RESET
H
H
H
H
H
H
VID
L
X
Read from SRAM
H
L
L
H
AIN
H
Write to SRAM
H
L
H
L
AIN
H
I/O7-I/O0
DOUT
High-Z
High-Z
DIN
DIN
DIN
DIN
High-Z
X
DOUT
High-Z
DOUT
DIN
High-Z
DIN
I/O15-I/O8
DOUT
High-Z
High-Z
DIN
X
X
X
High-Z
X
DOUT
DOUT
High-Z
DIN
DIN
High-Z
Legend:
L = Logic Low = VIL, H = Logic High = VIH, VID = 11.5-12.5V, = Pulse input, X = Don’t Care, DIN = Data In, DOUT = Data Out
Notes:
1. Other operations except for those indicated in this column are inhibited.
2. Do not apply CE_F = VIL, CE_S = VIL at the same time.
PRELIMINARY (March, 2005, Version 0.0)
9
AMIC Technology, Corp.