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A81L801UG-70F View Datasheet(PDF) - AMIC Technology

Part Name
Description
MFG CO.
'A81L801UG-70F' PDF : 47 Pages View PDF
A81L801
Table 5. A81L801 Command Definitions
Command
Sequence
(Note 1)
Read (Note 6)
1
Reset (Note 7)
1
Manufacturer ID
Word
Byte 4
Device ID,
Top Boot Block
Word
Byte 4
Device ID,
Word
Bottom Boot Block Byte 4
First
Addr Data
RA RD
XXX F0
555
AA
AAA
555
AA
AAA
555 AA
AAA
Second
Addr Data
2AA
55
555
2AA
55
555
2AA 55
555
Bus Cycles (Notes 2 - 5)
Third
Fourth
Addr Data Addr Data
Fifth
Addr Data
555
90
AAA
555
90
AAA
X00
X01
X02
37
B31A
1A
555 90 X01 B39B
AAA
X02 9B
Sixth
Addr Data
Continuation ID
Word
4
555
AA
2AA 55
555 90 X03
7F
Byte
AAA
555
AAA
X06
Word
555
Sector Protect Verify
(Note 9)
4
AA
Byte
AAA
2AA
55
555
555
90
AAA
(SA)
X02
(SA)
X04
XX00
XX01
00
01
Program
Word
555
Byte 4 AAA AA
2AA
555 55
555
A0 PA PD
AAA
Unlock Bypass
Word
555
2AA
Byte 3 AAA AA 555 55
555
AAA 20
Unlock Bypass Program (Note 10) 2 XXX A0 PA PD
Unlock Bypass Reset (Note 11) 2 XXX 90 XXX 00
Chip Erase
Word
555
Byte 6
AA
AAA
2AA
55
555
555
555
2AA
80
AA
55
AAA
AAA
555
Sector Erase
Word
555
2AA
Byte 6 AAA AA 555 55
555
555
80
AA
AAA
AAA
2AA
55
555
Erase Suspend (Note 12)
1 XXX B0
Erase Resume (Note 13)
1 XXX 30
555
10
AAA
SA 30
Legend:
X = Don't care
RA = Address of the memory location to be read.
RD = Data read from location RA during read operation.
PA = Address of the memory location to be programmed. Addresses latch on the falling edge of the WE or CE_F pulse,
whichever happens later.
PD = Data to be programmed at location PA. Data latches on the rising edge of WE or CE_F pulse, whichever happens first.
SA = Address of the sector to be verified (in autoselect mode) or erased. Address bits A18 - A12 select a unique sector.
Note:
1. See Table 1 for description of bus operations.
2. All values are in hexadecimal.
3. Except when reading array or autoselect data, all bus cycles are write operation.
4. Data bits I/O15~I/O8 are don’t care for unlock and command cycles.
5. Address bits A18 - A11 are don't cares for unlock and command cycles, unless SA or PA required.
6. No unlock or command cycles required when reading array data.
7. The Reset command is required to return to reading array data when device is in the autoselect mode, or if I/O5 goes high (while
the device is providing status data).
8. The fourth cycle of the autoselect command sequence is a read cycle.
9. The data is 00h for an unprotected sector and 01h for a protected sector. See “Autoselect Command Sequence” for more information.
10. The Unlock Bypass command is required prior to the Unlock Bypass Program command.
11. The Unlock Bypass Reset command is required to return to reading array data when the device is in the unlock bypass mode.
12. The system may read and program in non-erasing sectors, or enter the autoselect mode, when in the Erase Suspend mode.
13. The Erase Resume command is valid only during the Erase Suspend mode.
PRELIMINARY (March, 2005, Version 0.0)
20
AMIC Technology, Corp.
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