ACPL-333J-500E View Datasheet(PDF) - Avago Technologies
Part Name
Description
MFG CO.
'ACPL-333J-500E' PDF : 23 Pages View PDF
+_ 0.1μF
RF
CF
R
+_
1 VS
2 VCC1
3 FAULT
4 VS
5 CATHODE
6 ANODE
7 ANODE
8 CATHODE
VE 16
VLED 15
DESAT 14
0.1μF
CBLANK
100 Ω
DDESAT
VCC2 13
VEE 12
VOUT 11
VCLAMP 10
VEE 9
RG
+_
Q1
RPULL-DOWN
Q2
Figure 36. Recommended application circuit (Single Supply) with desaturation detection and active Miller Clamp
+ HVDC
+
VCE
-
3-PHASE
AC
+
VCE
-
- HVDC
Description of Operation
Normal Operation
During normal operation, VOUT of the ACPL-333J is con-
trolled by input LED current IF (pins 5, 6, 7 and 8), with
the IGBT collector-to-emitter voltage being monitored
through DESAT. The FAULT output is high. See Figure 37.
Fault Condition
The DESAT pin monitors the IGBT Vce voltage. When the
voltage on the DESAT pin exceeds 6.5 V while the IGBT is
on, VOUT is slowly brought low in order to “softly” turn-off
the IGBT and prevent large di/dt induced voltages. Also
activated is an internal feedback channel which brings
the FAULT output low for the purpose of notifying the
micro-controller of the fault condition.
Fault Reset
Once fault is detected, the output will be soft-shut down
to low. All input LED signals will be ignored during
the fault period to allow the driver to completely soft
shut-down the IGBT. For ACPL-333J, the driver will auto-
matically reset the FAULT pin after a fixed mute time of
25μs (typical). See Figure 37.
IF
t DESAT(LOW)
6.5V
V DESAT
t BLANK
VOUT
t DESAT(90%)
t DESAT(10%)
90%
10%
FAULT
t DESAT(FAULT)
Figure 37. Fault Timing diagram (ACPL-333J)
19
50%
50%
t DESAT(MUTE)
Automatic Reset
after mute time
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