ACPL-796J-000E View Datasheet(PDF) - Avago Technologies
Part Name
Description
MFG CO.
'ACPL-796J-000E' PDF : 16 Pages View PDF
Digital Filter
A digital filter converts the single-bit data stream from
the modulator into a multi-bit output word similar to
the digital output of a conventional A/D converter. With
this conversion, the data rate of the word output is also
reduced (decimation). A Sinc3 filter is recommended to
work together with the ACPL-796J. With a 10 MHz external
clock frequency, 256 decimation ratio and 16-bit word
settings, the output data rate is 39 kHz (= 10 MHz/256).
This filter can be implemented in an ASIC, an FPGA or a
DSP. Some of the ADC codes with corresponding input
voltages are shown in Table 10.
ISOLATED
5V
ISOLATION
BARRIER
NON-
ISOLATED
5 V/3.3 V
INPUT
CURRENT
RSHUNT
VDD1
10 0.1 VIN+
PF PF
VIN–
GND1
VDD2
MCLKIN
MDAT
GND2
VDD
SCLK
CLOCK
0.1 10
SDAT
PF PF
DATA
CS
GND
3-WIRE
SERIAL
INTERFACE
GND1
ACPL-796J
GND2
SINC3 FILTER
Note: In applications, a 0.1 F bypass capacitor must be connected between pins VDD1 and
GND1, and between pins VDD2 and GND2 of the ACPL-796J.
Figure 16. Typical application circuit with a Sinc3 filter.
12
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