ACS8509T View Datasheet(PDF) - Semtech Corporation
Part Name
Description
MFG CO.
'ACS8509T' PDF : 68 Pages View PDF
ACS8509 SETS
ADVANCED COMMUNICATIONS
Table 3 Other Pins (cont...)
Pin Number
Symbol
I/O
Type
8
INTREQ
O
TTL/CMOS
9
TCK
I
TTLD
10
21
23
30
31
36,
37
45
48
51
54
56
58 - 60
63 - 69
70
71
72
73
REFCLK
I
TDO
O
TDI
I
FrSync
O
MFrSync
O
O1POS, O1NEG O
SYNC2K
I
SEC1
I
SEC2
I
SEC3
I
SEC4
I
UPSEL(2:0)
I
A(6:0)
I
CSB
I
WRB
I
RDB
I
ALE
I
TTL
TTL/CMOS
TTLU
TTL/CMOS
TTL/CMOS
PECL/LVDS
TTLD
TTLD
TTLD
TTLD
TTLD
TTLD
TTLD
TTLU
TTLU
TTLU
TTLD
74
PORB
I
TTLU
FINAL
DATASHEET
Description
Interrupt Request: Active High software Interrupt output.
JTAG Clock: Boundary Scan clock input. If not used connect to GND or leave
floating. This pin may require a capacitor placed between the pin and the
nearest GND, to reduce noise pickup. A value of 10 pF should be adequate,
but the value is dependent on PCB layout.
Reference Clock: 12.800 MHz (refer to “Local Oscillator Clock” on page 8).
JTAG Output: Serial test data output. Updated on falling edge of TCK. If not
used leave floating.
JTAG Input: Serial test data Input. Sampled on rising edge of TCK. If not
used connect to VDD or leave floating.
Output Reference: 8 kHz Frame Sync output (square wave).
Output Reference: 2 kHz Multi-Frame Sync output (square wave).
Output Reference O1: Programmable, default 19.44 MHz. Also 51.84 MHz,
77.76 MHz, 155.52 MHz. MHz, default type PECL.
Synchronize 2 kHz: Connect to 2 kHz Multi-Frame Sync output of partner
ACS8509 in redundancy system.
Input Reference SEC1: Programmable, default 19.44 MHz
(Default Priority 7).
Input Reference SEC2 : Programmable, default 19.44 MHz
(Default Priority 8).
Input Reference SEC3: Programmable, default (Master mode)
1.544/2.048 MHz, default (Slave mode) 6.48 MHz.
(Default Priority 11).
Input Reference SEC4 (Priority 13): Programmable, default
1.544/2.048 MHz (Default Priority 13).
Microprocessor Select: Configures the interface for a particular
microprocessor type at reset.
Microprocessor Interface Address: Address bus for the microprocessor
interface registers. A(0) is SDI in Serial mode - output in EPROM mode only.
Chip Select (Active Low): This pin is asserted Low by the microprocessor to
enable the microprocessor interface - output in EPROM mode only.
Write (Active Low): This pin is asserted Low by the microprocessor to
initiate a write cycle. In Motorola mode, WRB = 1 for Read.
Read (Active Low): This pin is asserted Low by the microprocessor to
initiate a read cycle.
Address Latch Enable: This pin becomes the address latch enable from the
microprocessor. When this pin transitions from High to Low, the address
bus inputs are latched into the internal registers. ALE = SCLK in Serial
mode.
Power-On Reset: Master reset. If PORB is forced Low, all internal states are
reset back to default values.
Revision 2.00/January 2006 © Semtech Corp.
Page 6
www.semtech.com
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