ACS8522A View Datasheet(PDF) - Semtech Corporation
Part Name
Description
MFG CO.
'ACS8522A' PDF : 118 Pages View PDF
ACS8522A SETS LITE
ADVANCED COMMS & SENSING
FINAL
Figure 12 and Figure 13 show the timing diagrams of read and write accesses for this mode.
Figure 12 Read Access Timing for SERIAL Interface
CLKE = 0; SDO data is clocked out on the rising edge of SCLK
DATASHEET
CSB
SCLK
SDI
SDO
CSB
SCLK
tsu2
tpw2
th2
tsu1
th1 tpw1
_
R/W A0 A1 A2 A3 A4 A5 A6
Output not driven, pulled low by internal resistor
td1
td2
D0 D1 D2 D3 D4 D5 D6 D7
CLKE = 1; SDO data is clocked out on the falling edge of SCLK
th2
SDI
SDO
_
R/W A0 A1 A2 A3 A4 A5 A6
td1
td2
Output not driven, pulled low by internal resistor
D0 D1 D2 D3 D4 D5 D6 D7
F8526D_013ReadAccSerial_01
Table 18 Read Access Timing for SERIAL Interface (For use with Figure 12)
Symbol
tsu1
tsu2
td1
td2
tpw1
tpw2
th1
th2
tp
Parameter
Setup SDI valid to SCLKrising edge
Setup CSBfalling edge to SCLKrising edge
Delay SCLKrising edge (SCLKfalling edge for CLKE = 1) to SDO valid
Delay CSBrising edge to SDO high-Z
SCLK Low time
SCLK High time
Hold SDI valid after SCLKrising edge
Hold CSB Low after SCLKrising edge, for CLKE = 0
Hold CSB Low after SCLKfalling edge, for CLKE = 1
Time between consecutive accesses (CSBrising edge to CSBfalling edge)
MIN
4 ns
14 ns
-
-
22 ns
22 ns
6 ns
5 ns
10 ns
Revision 1.00/September 2007 © Semtech Corp.
Page 39
TYP
MAX
-
-
-
-
-
18 ns
-
16 ns
-
-
-
-
-
-
-
-
-
-
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