ACT8897Q4I11C-T View Datasheet(PDF) - Active-Semi, Inc
Part Name
Description
MFG CO.
'ACT8897Q4I11C-T' PDF : 32 Pages View PDF
ACT8897
Rev 2, 05-Sep-13
Table 4:
ACT8897 and Samsung S5PV210 Signal Interface
ACT8897
PWREN
SCL
SDA
VSEL
nRSTO
nIRQ
nPBSTAT
PWRHLD
DIRECTION
1: Optional connection for DVS control.
2, : Typical connections shown, actual connections may vary.
: Optional connection for power hold control.
Table 5:
Control Pins
PIN NAME
nPBIN
PWRHLD
PWREN
SAMSUNG S5PV210
XPWRRGTON
Xi2cSCL[0]
Xi2cSDA[0]
DVS_GPIO
XnRESET
XEINT0
XEINT1
Power hold GPIO
OUTPUT
REG1, REG2, REG3, REG4, REG5, REG6, REG7
REG1, REG5
REG2, REG3, REG4, REG6, REG7
Control Signals
Enable Inputs
The ACT8897 features a variety of control inputs,
which are used to enable and disable outputs
depending upon the desired mode of operation.
PWREN, PWRHLD are logic inputs, while nPBIN is
a unique, multi-function input. Refer to Table 5 for a
description of which channels are controlled by
each input.
nPBIN Multi-Function Input
ACT8897 features the nPBIN multi-function pin,
which combines system enable/disable control with
a hardware reset function. Select either of the two
pin functions by asserting this pin, either through a
direct connection to GA, or through a 50kΩ resistor
to GA, as shown in Figure 2.
nPBSTAT Output
nPBSTAT is an open-drain output that reflects the
state of the nPBIN input; nPBSTAT is asserted low
whenever nPBIN is asserted, and is high-Z
otherwise. This output is typically used as an
interrupt signal to the processor, to initiate a
software-programmable routine such as operating
mode selection or to open a menu. Connect
nPBSTAT to an appropriate supply voltage
(typically OUT1) through a 10kΩ or greater resistor.
Figure 2:
nPBIN Input
Manual Reset Function
The second major function of the nPBIN input is to
provide a manual-reset input for the processor. To
manually-reset the processor, drive nPBIN directly
to GA through a low impedance (less than 2.5kΩ).
When this occurs, nRSTO immediately asserts low,
then remains asserted low until the nPBIN input is
de-asserted and the reset timeout period expires.
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