AD7908 View Datasheet(PDF) - Analog Devices
Part Name
Description
MFG CO.
'AD7908' PDF : 24 Pages View PDF
and signal-to-noise ratio are critical, the analog input should be
driven from a low impedance source. Large source impedances
significantly affect the ac performance of the ADC. This can
necessitate the use of an input buffer amplifier. The choice of
the op amp is a function of the particular application.
When no amplifier is used to drive the analog input, the source
impedance should be limited to low values. The maximum
source impedance depends on the amount of total harmonic
distortion (THD) that can be tolerated. The THD increases as
the source impedance increases, and performance degrades (see
Figure 8).
AVDD
VIN
C1
4pF
D1
C2
R1
30pF
D2
CONVERSION PHASE: SWITCH OPEN
TRACK PHASE: SWITCH CLOSED
Figure 16. Equivalent Analog Input Circuit
ADC TRANSFER FUNCTION
The output coding of the AD7908/AD7918/AD7928 is either
straight binary or twos complement, depending on the status of
the LSB in the control register. The designed code transitions
occur at successive LSB values (that is, 1 LSB, 2 LSBs, and so
on). The LSB size is REFIN/256 for the AD7908, REFIN/1024 for
the AD7918, and REFIN/4096 for the AD7928. The ideal transfer
characteristic for the AD7908/AD7918/AD7928 when straight
binary coding is selected is shown in Figure 17, and the ideal
transfer characteristic for the AD7908/AD7918/AD7928 when
twos complement coding is selected is shown in Figure 18.
111…111
111…110
•
•
111…000
•
011…111
•
•
000…010
000…001
000…000
1LSB = VREF/256 AD7908
1LSB = VREF/1024 AD7918
1LSB = VREF/4096 AD7928
0V 1 LSB
+VREF – 1 LSB
ANALOG INPUT
NOTE
1. VREF IS EITHER REFIN OR 2 × REFIN.
Figure 17. Straight Binary Transfer Characteristic
AD7908/AD7918/AD7928
011…111
011…110
•
•
000…001
000…000
111…111
•
•
100…010
100…001
100…000
1LSB = 2 × VREF/256 AD7908
1LSB = 2 × VREF/1024 AD7918
1LSB = 2 × VREF/4096 AD7928
–VREF + 1 LSB
+VREF – 1 LSB
VREF – 1 LSB
ANALOG INPUT
Figure 18. Twos Complement Transfer Characteristic
with REFIN ± REFIN Input Range
HANDLING BIPOLAR INPUT SIGNALS
Figure 19 shows how useful the combination of the 2 × REFIN
input range and the twos complement output coding scheme is
for handling bipolar input signals. If the bipolar input signal is
biased about REFIN and twos complement output coding is
selected, then REFIN becomes the zero code point, −REFIN is
negative full scale and +REFIN becomes positive full scale, with
a dynamic range of 2 × REFIN.
TYPICAL CONNECTION DIAGRAM
Figure 20 shows a typical connection diagram for the
AD7908/AD7918/AD7928. In this setup, the AGND pin is
connected to the analog ground plane of the system. In Figure 20,
REFIN is connected to a decoupled 2.5 V supply from a reference
source, the AD780, to provide an analog input range of 0 V to
2.5 V (if RANGE bit is 1) or 0 V to 5 V (if RANGE bit is 0).
Although the AD7908/AD7918/AD7928 is connected to a VDD
of 5 V, the serial interface is connected to a 3 V microprocessor.
The VDRIVE pin of the AD7908/AD7918/ AD7928 is connected
to the same 3 V supply of the microprocessor to allow a 3 V
logic interface (see the Digital Inputs section). The conversion
result is output in a 16-bit word. This 16-bit data stream
consists of a leading zero, three address bits indicating which
channel the conversion result corresponds to, followed by the 12
bits of conversion data for the AD7928 (10 bits of data for the
AD7918 and 8 bits of data for the AD7908, each followed by
two and four trailing zeros, respectively). For applications
where power consumption is of concern, the power-down
modes should be used between conversions or bursts of several
conversions to improve power performance (see the Modes of
Operation section).
Rev. D | Page 19 of 32
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