AD807 View Datasheet(PDF) - Analog Devices

Part Name

Description

MFG CO.

AD807

Fiber Optic Receiver with Quantizer and Clock Recovery and Data Retiming

Analog Devices 

Prev 11 12

AD807

C1 0.1µF

SDOUT

J1

J2

C2

0.1µF

R1 R2

100 100

C3

0.1µF

R5 100

R6 100

R9 R10

154 154

1 DATAOUTN

2 DATAOUTP

VEE 16

SDOUT 15

C4

0.1µF

J3

J4

C5

0.1µF

R3 R4

100 100

C6

0.1µF

R7 100

R8 100

R11

150

3

C7 0.1µF

4

5

6

0.1µF C8

R12

7

150 CD

0.1µF

8

VCC2

CLKOUTN

AVCC2 14

C11 0.1

PIN 13

CLKOUTP

VCC1

CF1

NIN 12 C10 0.1

AVCC1 11

THRADJ 10

CF2 AD807 AVEE 9

C12 0.1

R16

330 C13

0.1 R17

R14 R15

3.9k

47

47

120nH

2 PIN TIA

1µF

EPITAXX

1

ERM504

C14 30pF

0.1

30pF

NOISE FILTER

3

R13

THRADJ

NOTE

PIN TIA PIN 4 (CASE)

IS CONNECTED TO

GROUND

C9 10

+5V

Figure 26. AD807 Application with Epitaxx PIN—Transimpedance Amplifier Module

The entire circuit was enclosed in a shielded box. Table I sum-

marizes results of tests performed using a 223-1 PRN Sequence,

and varying the average power at the PIN diode.

The circuit acquires and maintains lock with an average input

power as low as –39.25 dBm.

Table II. AD807—Epitaxx ERM504 PIN TIA 155 Mbps

Fiber Optic Receiver Circuit:

Output Bit Error Rate & Output Jitter vs. Average Input Power

Average Optical

Input Power

(dBm)

0

–3

–10

–20

–30

–32

–34

–35

–35.5

–36

–37.0

–37.6

–38.0

Output Bit

Error Rate

0.0 × 10–10

0.0 × 10–10

0.0 × 10–10

0.0 × 10–10

0.0 × 10–10

0.0 × 10–10

0.0 × 10–10

0.0 × 10–10

0.0 × 10–10

0.0 × 10–10

0.0 × 10–10

0.5 × 10–10

4 × 10–6

Output Jitter

(ps rms)

29

35

40

37

33

35

36

39

40

41

42

43

50

SONET (OC-3)/SDH (STM-1) Fiber Optic Receiver Circuit

A light wave receiver circuit for SONET/SDH application at

155 Mbps is shown in Figure 26, with test results given in Table

II. The circuit operates from a single +5 V supply, and uses two

major components: an Epitaxx ERM504 PIN-TIA module with

AGC, and the AD807 IC.

A 120 MHz, third order, low-pass Butterworth filter at the out-

put of the PIN-TIA module provides adequate bandwidth (70%

of the bit rate), and attenuates high frequency (out of band)

noise.

250mV

50mV/

DIV

–250mV

38.12ns

1ns/DIV

48.12ns

Figure 27. Receiver Output (Data) Eye Diagram,

0 dBm Optical Input

250mV

50mV/

DIV

–250mV

38.12ns

1ns/DIV

48.12ns

Figure 28. Receiver Output (Data) Eye Diagram,

–38 dBm Optical Input

REV. A

–11–

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