Qdatasheet_Logo
Integrated circuits, Transistor, Semiconductors Search and Datasheet PDF Download Site

AD8567 View Datasheet(PDF) - Analog Devices

Part Name
Description
MFG CO.
'AD8567' PDF : 12 Pages View PDF
Prev 11 12
AD8565/AD8566/AD8567
OUTLINE DIMENSIONS
3.20
3.00
2.80
8
3.20
3.00
2.80 1
5 5.15
4.90
4.65
4
PIN 1
0.65 BSC
0.95
0.85
1.10 MAX
0.75
0.15 0.38
0.00 0.22
0.80
0.23
0.08
0.60
0.40
COPLANARITY SEATING
0.10
PLANE
COMPLIANT TO JEDEC STANDARDS MO-187-AA
Figure 34. 8-Lead Micro Small Outline Package [MSOP]
(RM-8)
Dimensions shown in millimeters
2.20
2.00
1.80
1.35
5
4
2.40
1.25
2.10
1.15
1
2
3
1.80
PIN 1
1.00
0.90
0.70
0.65 BSC
1.10
0.40
0.80
0.10
0.46
0.10 MAX
0.30
0.15
0.22
SEATING
0.08
0.36
0.26
PLANE
0.10 COPLANARITY
COMPLIANT TO JEDEC STANDARDS MO-203-AA
Figure 35. 5-Lead Thin Shrink Small Outline Transistor Package [SC70]
(KS-5)
Dimensions shown in millimeters
5.10
5.00
4.90
14
4.50
4.40
4.30
8
6.40
BSC
1
7
PIN 1
1.05
0.65
1.00
BSC
0.80
1.20 0.20
MAX 0.09
0.75
0.15 0.30
0.05 0.19
SEATING
PLANE
COPLANARITY
0.10
0.60
0.45
COMPLIANT TO JEDEC STANDARDS MO-153-AB-1
Figure 36. 14-Lead Thin Shrink Small Outline Package [TSSOP]
(RU-14)
Dimensions shown in millimeters
Rev. D | Page 12 of 16
Share Link: GO URL

All Rights Reserved © qdatasheet.com  [ Privacy Policy ] [ Contact Us ]