ADAU1401AWBSTZ View Datasheet(PDF) - Analog Devices
Part Name
Description
MFG CO.
'ADAU1401AWBSTZ' PDF : 52 Pages View PDF
Table 22. Parameter RAM Read/Write Format (Single Address)
Byte 0
Byte 1
Byte 2
CHIP_ADR[6:0], W/R
000000, PARAM_ADR[9:8]
PARAM_ADR[7:0]
Byte 3
0000, PARAM[27:24]
ADAU1401A
Bytes[4:6]
PARAM[23:0]
Table 23. Parameter RAM Block Read/Write Format (Burst Mode)
Byte 0
Byte 1
Byte 2
Byte 3
Bytes[4:6]
CHIP_ADR[6:0], W/R 000000, PARAM_ADR[9:8] PARAM_ADR[7:0] 0000, PARAM[27:24] PARAM[23:0]
<—PARAM_ADR—>
Bytes[7:10]
…
PARAM_ADR + 1
Bytes[11:14]
…
PARAM_ADR + 2
Table 24. Program RAM Read/Write Format (Single Address)
Byte 0
Byte 1
Byte 2
CHIP_ADR[6:0], W/R
00000, PROG_ADR[10:8]
PROG_ADR[7:0]
Bytes[3:7]
PROG[39:0]
Table 25. Program RAM Block Read/Write Format (Burst Mode)
Byte 0
Byte 1
Byte 2
CHIP_ADR[6:0], W/R 00000, PROG_ADR[10:8] PROG_ADR[7:0]
Bytes[3:7]
PROG[39:0]
<—PROG_ADR—>
Bytes[8:12]
…
PROG_ADR + 1
Bytes[13:17]
…
PROG_ADR + 2
Table 26. Control Register Read/Write Format (Core, Serial Out 0, Serial Out 1)
Byte 0
Byte 1
Byte 2
CHIP_ADR[6:0], W/R
0000, REG_ADR[11:8]
REG_ADR[7:0]
Byte 3
Data[15:8]
Byte 4
Data[7:0]
Table 27. Control Register Read/Write Format (RAM Configuration, Serial Input)
Byte 0
Byte 1
Byte 2
CHIP_ADR[6:0], W/R
0000, REG_ADR[11:8]
REG_ADR[7:0]
Byte 3
Data[7:0]
Table 28. Data Capture Register Write Format
Byte 0
Byte 1
CHIP_ADR[6:0], 0000, DATA_CAPTURE_ADR[11:8]
W/R
Byte 2
DATA_CAPTURE_ADR[7:0]
Byte 3
Byte 4
000, PROGCOUNT[10:6]1 PROGCOUNT[5:0],1 REGSEL[1:0]2
1 PROGCOUNT[10:0] is the value of the program counter when the data capture occurs (the table of values is generated by the SigmaStudio compiler).
2 REGSEL[1:0] selects one of four registers (see the Address 2074 and Address 2075 (0X081A and 0X081B)—Data Capture Registers section).
Table 29. Data Capture (Control Port Readback) Register Read Format
Byte 0
Byte 1
CHIP_ADR[6:0], W/R
0000, DATA_CAPTURE_ADR[11:8]
Byte 2
DATA_CAPTURE_ADR[7:0]
Bytes[3:5]
Data[23:0]
Table 30. Safeload Address Register Write Format
Byte 0
Byte 1
CHIP_ADR[6:0], W/R
0000, SAFELOAD_ADR[11:8]
Byte 2
Byte 3
SAFELOAD_ADR[7:0] 000000, PARAM_ADR[9:8]
Byte 4
PARAM_ADR[7:0]
Table 31. Safeload Data Register Write Format
Byte 0
Byte 1
CHIP_ADR[6:0], W/R 0000, SAFELOAD_ADR[11:8]
Byte 2
Byte 3
SAFELOAD_ADR[7:0] 00000000
Rev. A | Page 31 of 52
Byte 4
0000, Data[27:24]
Bytes[5:7]
Data[23:0]
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