ADE7854AACPZ View Datasheet(PDF) - Analog Devices
Part Name
Description
MFG CO.
'ADE7854AACPZ' PDF : 96 Pages View PDF
ADE7854A/ADE7858A/ADE7868A/ADE7878A
Data Sheet
TIMING CHARACTERISTICS
VDD = 3.3 V ± 10%, AGND = DGND = 0 V, on-chip reference, CLKIN = 16.384 MHz, TMIN to TMAX = −40°C to +85°C. Note that within
the timing tables and diagrams, dual function pin names are referenced by the relevant function only (see the Pin Configuration and
Function Descriptions section for full pin mnemonics and descriptions).
I2C Interface Timing
Table 3.
Parameter
SCL Clock Frequency
Hold Time for Start and Repeated Start Conditions
Low Period of SCL Clock
High Period of SCL Clock
Setup Time for Repeated Start Condition
Data Hold Time
Data Setup Time
Rise Time of SDA and SCL Signals
Fall Time of SDA and SCL Signals
Setup Time for Stop Condition
Bus Free Time Between a Stop and Start Condition
Pulse Width of Suppressed Spikes
Symbol
fSCL
tHD;STA
tLOW
tHIGH
tSU;STA
tHD;DAT
tSU;DAT
tR
tF
tSU;STO
tBUF
tSP
Standard Mode
Min
Max
0
100
4.0
4.7
4.0
4.7
0
3.45
250
1000
300
4.0
4.7
N/A1
Fast Mode
Min
Max
0
400
0.6
1.3
0.6
0.6
0
0.9
100
20
300
20
300
0.6
1.3
50
Unit
kHz
μs
µs
µs
µs
µs
ns
ns
ns
µs
µs
ns
1 N/A means not applicable.
SDA
tF
tR
tLOW
SCL
tHD;STA tHD;DAT
START
CONDITION
tSU;DAT
tF
tHD;STA
tHIGH
tSU;STA
REPEATED START
CONDITION
Figure 5. I2C Interface Timing
tSP
tR
tBUF
tSU;STO
STOP
START
CONDITION CONDITION
Rev. C | Page 10 of 96
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