ADSP-21msp58/59–SPECIFICATIONS
ADSP-21msp58/59
RECOMMENDED OPERATING CONDITIONS
Parameter
VDD
TAMB
Supply Voltage
Ambient Operating Temperature
See “Environmental Conditions” for information on thermal specifications.
B Grade
Min
Max
4.50
5.50
–40
+85
Unit
V
°C
ELECTRICAL CHARACTERISTICS
Parameter
Test Conditions
Min
Max
Unit
VIH
Hi-Level Input Voltage1, 2
@ VDD = max
2.0
V
VIH
Hi-Level CLKIN Voltage
VIL
Lo-Level Input Voltage1, 3
VOH
Hi-Level Output Voltage1, 4, 5
@ VDD = max
@ VDD = min
@ VDD = min,
2.2
V
0.8
V
IOH = –0.5 mA
2.4
V
@ VDD = min,
IOH = –100 µA6
VDD – 0.3
V
VOL
Lo-Level Output Voltage1, 4, 5
@ VDD = min,
IIH
Hi-Level Input Current3
IOL = 2 mA
@ VDD = max,
IIL
Lo-Level Input Current3
VIN = VDD max
@ VDD = max,
VIN = 0 V
IOZH
Tristate Leakage Current7
@ VDD = max,
VIN = VDD max8
IOZL
Tristate Leakage Current7
@ VDD = max,
VIN = 0 V8
IDD
Digital Supply Current (Idle)6, 9
@ VDD = max,
0.4
V
10
µA
10
µA
10
µA
10
µA
Codec Inactive
18
mA
IDD
Digital Supply Current (Dynamic)9, 10 @ VDD = max,
VCC = max
IDD
Digital Supply Current (Powerdown)9 @ VDD = max, See
92
mA
ADSP-2100 Family User’s
Manual, Chapter 9
100
µA
ICC
Analog Supply Current (Dynamic)9
Codec Active
CI
Input Pin Capacitance3, 11, 12
@ VIN = 2.5 V,
18
mA
fIN = 1.0 MHz,
TAMB = 25°C
CO
Output Pin Capacitance7, 11, 12
@ VIN = 2.5 V,
8
pF
fIN = 1.0 MHz,
TAMB = 25°C
8
pF
NOTES
1Bidirectional pins: D0-D23, RFS0, RFS1, SCLK0, SCLK1, TFS0, TFS1, HD0-HD7/HAD0-HAD7.
2Input only pins: RESET, IRQ2, BR, MMAP, DR0, DR1, HSEL, HSIZE, BMODE, HMD0, HMD1, HRD/HWR, HWR/HDS, PWD, HA2/ALE, HA1-0.
3Input only pins: CLKIN, RESET, IRQ2, BR, MMAP, DR0, DR1, HSEL, HSIZE, BMODE, HMD0, HMD1, HRD/HWR, HWR/HDS, PWD, HA2/ALE, HA1-0.
4Output pins: BG, PMS, DMS, BMS, RD, WR, A0-A13, DT0, DT1, CLKOUT, HACK, FL0.
5Although specified for TTL outputs, all ADSP-21msp58/59 outputs are CMOS-compatible and will drive to V DD and GND, assuming no dc loads.
6Idle refers to ADSP-21msp58/59 state of operation during IDLE instruction. Deasserted pins are driven to either V DD or GND. Refer to chart in back for lower
IDLE currents.
7Three-statable pins: A0-A13, D0-D23, PMS, DMS, BMS, RD, WR, DT0, DT1, SCLK0, SCLK1, TFS0, TFS1, RFS0, RSF1, HD0-HD7/HAD0-HAD7.
80 V on BR, CLKIN Active (to force three-state condition).
9Current reflects the digital portion of device operating with no output loads and a 2 k Ω load on the analog output (VOUTP, VOUTN).
10tCK = 76.92 ns, CODEC active, 80% execution type 1 instructions, with random data. For typical figures for digital and analog supply currents, refer to “Power
Dissipation” section.
11Guaranteed but not tested.
12Output pin capacitance is the capacitive load for any three-stated output pin.
Specifications subject to change without notice.
REV. 0
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