ADSP-BF537BBCZ-5AV View Datasheet(PDF) - Analog Devices
Part Name
Description
MFG CO.
'ADSP-BF537BBCZ-5AV' PDF : 68 Pages View PDF
ADSP-BF534/ADSP-BF536/ADSP-BF537
Asynchronous Memory Read Cycle Timing
Table 24. Asynchronous Memory Read Cycle Timing
Parameter
Timing Requirements
tSDAT
DATA15–0 Setup Before CLKOUT
tHDAT
DATA15–0 Hold After CLKOUT
tSARDY
ARDY Setup Before CLKOUT
tHARDY
ARDY Hold After CLKOUT
Switching Characteristics
tDO
Output Delay After CLKOUT1
tHO
Output Hold After CLKOUT 1
1 Output pins include AMS3–0, ABE1–0, ADDR19–1, AOE, ARE.
Min
Max
Unit
2.1
ns
0.8
ns
4.0
ns
0.0
ns
6.0
ns
0.8
ns
CLKOUT
AMSx
SETUP
2 CYCLES
tDO
PROGRAMMED READ
ACCESS 4 CYCLES
ACCESS EXTENDED
HOLD
3 CYCLES
1 CYCLE
tHO
ABE1–0
ADDR19–1
AOE
ARE
ARDY
DATA 15–0
tDO
tSARDY
tHO
tHARDY
tSARDY
tHARDY
tSDAT
tHDAT
Figure 11. Asynchronous Memory Read Cycle Timing
Rev. J | Page 31 of 68 | February 2014
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