ADSP-BF539F View Datasheet(PDF) - Analog Devices
Part Name
Description
MFG CO.
'ADSP-BF539F' PDF : 60 Pages View PDF
ADSP-BF539/ADSP-BF539F
SETUP
2 CYCLES
PROGRAMMED WRITE
ACCESS 2 CYCLES
ACCESS
EXTENDED
1 CYCLE
HOLD
1 CYCLE
CLKOUT
t DO
AMSx
Preliminary Technical Data
tHO
ABE1–0
ADDR19–1
AWE
ARDY
DATA15–0
CLKOUT
AMSx
BE, ADDRESS
tDO
tHO
t SARDY
t ENDAT
t SARDY
WRITE DATA
tHARDY
t HARDY
t DDAT
Figure 14. Asynchronous Memory Write Cycle Timing with Synchronous ARDY
SETUP
2 CYCLES
PROGRAMMED WRITE
ACCESS 2 CYCLES
ACCESS
EXTENDED
HOLD
1 CYCLE
t DO
t HO
ABE1–0
ADDR19–1
AWE
ARDY
DATA15–0
BE, ADDRESS
tDO
tDANW
tHO
tHAA
t ENDAT
WRITE DATA
Figure 15. Asynchronous Memory Write Cycle Timing with Asynchronous ARDY
Rev. PrF | Page 36 of 68 | September 2006
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