ADUC7033BSTZ-88 View Datasheet(PDF) - Analog Devices
Part Name
Description
MFG CO.
'ADUC7033BSTZ-88' PDF : 140 Pages View PDF
ADuC7033
SYSTEM CLOCKS
The ADuC7033 integrates a very flexible clocking system that
can be clocked from one of three sources: an integrated on-chip
precision oscillator, an integrated on-chip low power oscillator,
or an external watch crystal. These three options are shown in
Figure 29.
Each of the internal oscillators are divided by four to generate a
clock frequency of 32.768 kHz. The PLL locks onto a multiple
(625) of 32.768 kHz, supplied by either of the internal oscillators
or the external crystal, to provide a stable 20.48 MHz clock for
the system. The core can operate at this frequency, or at binary
submultiples of it, thereby allowing power saving when peak
performance is not required.
By default, the PLL is driven by the low power oscillator that
generates a 20.48 MHz clock source. The ARM7TDMI core is
driven by a CD divided clock derived from the output of the PLL.
By default, the CD divider is configured to divide the PLL
output by two, thereby generating a core clock of 10.24 MHz.
The divide factor can be modified to generate a binary weighted
divider factor from 1 to 128 that can be altered dynamically by
user code.
The ADC is driven by the output of the PLL, divided to give an
ADC clock source of 512 kHz. In low power mode, the ADC
clock source is switched from the standard 512 kHz to the low
power 131 kHz oscillator.
Note that the low power oscillator drives both the watchdog and
core wake-up timers through a divide-by-four circuit. A detailed
block diagram of the ADuC7033 clocking system is shown in
Figure 29.
EXTERNAL CRYSTAL
(OPTIONAL)
PRECISION
131kHz
CRYSTAL
CIRCUITRY
LOW POWER
131kHz
PRECISION
OSCILLATOR
EXTERNAL
32.768kHz
LOW POWER
OSCILLATOR
PRECISION
32.768kHz
LOW POWER
32.768kHz
DIV 4
PLLCON
DIV 4
PRECISION
131kHz
EXTERNAL
32.768kHz
LOW POWER
OSCILLATOR
EXTERNAL
32.768kHz
PRECISION
32.768kHz
LOW POWER
32.768kHz
CORE CLOCK
GPIO_5
1
8
PLL LOCK
CORE
CLOCK
1
2CD
MCU
CORE CLOCK
PLL OUTPUT
(20.48MHz)
PLL
ECLK 2.5MHz
PLL OUTPUT
20.48MHz
CLOCK
DIVIDER
FLASH
CONTROLLER
ADCMDE
GPIO_8
CORE CLOCK
LOW POWER
32.768kHz
CORE CLOCK
EXTERNAL
32.768kHz
PRECISION
32.768kHz
LOW POWER
32.768kHz
ADC
CLOCK
ADC
LOW POWER
32.768kHz
LOW POWER
32.768kHz
CORE CLOCK
SPI
CORE CLOCK
UART
LOW POWER
32.768kHz
PLL OUTPUT
(5MHz)
Figure 29. ADuC7033 System Clock Generation
HIGH ACCURCY
CALIBRATION
COUNTER
LOW POWER
CALIBRATION
COUNTER
TIMER 0
LIFE TIME
TIMER 1
TIMER 2
WAKE-UP
WATCHDOG
TIMER 3
TIMER 4
STI
LIN H/W
SYNCHRONIZATION
Rev. B | Page 66 of 140
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