ADV7189B View Datasheet(PDF) - Analog Devices
Part Name
Description
MFG CO.
'ADV7189B' PDF : 104 Pages View PDF
ADV7189B
SYNCHRONIZATION OUTPUT SIGNALS
HS Configuration
The following controls allow the user to configure the behavior
of the HS output pin only:
• Beginning of HS signal via HSB[10:0]
• End of HS signal via HSE[10:0]
• Polarity of HS using PHS
The HS Begin and HS End registers allow the user to freely
position the HS output (pin) within the video line. The values
in HSB[10:0] and HSE[10:0] are measured in pixel units from
the falling edge of HS. Using both values, the user can program
both the position and length of the HS output signal.
HSB[10:0] HS Begin, Address 0x34[6:4], Address
0x35[7:0]
The position of this edge is controlled by placing a binary
number into HSB[10:0]. The number applied offsets the edge
with respect to an internal counter that is reset to 0 immediately
after EAV code FF, 00, 00, XY (see Figure 201H 20). HSB is set to
00000000010b, which is 2 LLC1 clock cycles from count[0].
The default value of HSB is 0x002, indicating that the HS pulse
starts two pixels after the falling edge of HS.
HSE[10:0] HS End, Address 0x34[2:0], Address 0x36[7:0]
The position of this edge is controlled by placing a binary num-
ber into HSE[10:0]. The number applied offsets the edge with
respect to an internal counter that is reset to 0 immediately after
EAV Code FF, 00, 00, XY (see 20HFigure 20). HSE is set to
00000000000b, which is 0 LLC1 clock cycles from count[0].
The default value of HSE[10:0] is 000, indicating that the HS
pulse ends zero pixels after falling edge of HS.
For example:
1. To shift the HS toward active video by 20 LLC1s, add
20 LLC1s to both HSB and HSE, that is, HSB[10:0] =
[00000010110], HSE[10:0] = [00000010100].
2. To shift the HS away from active video by 20 LLC1s,
add 1696 LLC1s to both HSB and HSE (for NTSC), that
is, HSB[10:0] =[1101010010], HSE[10:0] = [11010100000]
(1696 is derived from the NTSC total number of pixels =
1716).
To move 20 LLC1s away from active video is equal to subtracting
20 from 1716 and adding the result in binary to both HSB[10:0]
and HSE[10:0].
PHS Polarity HS, Address 0x37[7]
The polarity of the HS pin can be inverted using the PHS bit.
When PHS is 0 (default), HS is active high.
When PHS is 1, HS is active low.
Table 55. HS Timing Parameters (See Figure 203H 20)
Standard
NTSC
NTSC Square
Pixel
PAL
HS Begin Adjust
(HSB[10:0]) (Default)
00000000010b
00000000010b
HS End Adjust
(HSE[10:0]) (Default)
00000000000b
00000000000b
00000000010b
00000000000b
Characteristic
HS to Active Video (LLC1
Clock Cycles)
(C in Figure 20) (Default)
204H
272
276
284
Active Video
Samples/Line
(D in Figure 20)
205H
720Y + 720C = 1440
640Y + 640C = 1280
720Y + 720C = 1440
Total LLC1
Clock Cycles
(E in Figure 20)
206H
1716
1560
1728
LLC1
PIXEL
BUS
HS
Cr Y
ACTIVE
VIDEO
FF 00 00 XY 80
EAV
10 80 10 80 10
H BLANK
FF 00 00 XY Cb Y Cr Y Cb Y Cr
SAV
ACTIVE VIDEO
HSE[10:0]
HSB[10:0]
4 LLC1
C
D
D
E
E
Figure 20. HS Timing
Rev. B | Page 40 of 104
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