ADV7189B View Datasheet(PDF) - Analog Devices
Part Name
Description
MFG CO.
'ADV7189B' PDF : 104 Pages View PDF
ADV7189B
OUTPUT
VIDEO
FIELD 1
622
623 624
625
1
2
3
4
5
6
7
8
9
10
11
23
24
HS
OUTPUT
VS
OUTPUT
FIELD
OUTPUT
OUTPUT
VIDEO
PVBEG[4:0] = 0x1
PVEND[4:0] = 0x4
FIELD 2
PFTOG[4:0] = 0x6
310
311
312
313
314
315
316
317
318
319
320
321
322 323
336
337
HS
OUTPUT
VS
OUTPUT
FIELD
OUTPUT
PVBEG[4:0] = 0x1
PVEND[4:0] = 0x4
PFTOG[4:0] = 0x6
Figure 27. PAL Typical Vsync/Field Positions Using Register Writes in Table 57
216H
1
PVBEGSIGN
0
ADVANCE BEGIN OF
VSYNC BY PVBEG[4:0]
DELAY BEGIN OF
VSYNC BY PVBEG[4:0]
NOT VALID FOR USER
PROGRAMMING
ODD FIELD?
YES
NO
PVBEGDELO
1
0
ADDITIONAL
DELAY BY
1 LINE
PVBEGDELE
0
1
ADDITIONAL
DELAY BY
1 LINE
VSBHO
1
0
ADVANCE BY
0.5 LINE
VSBHE
0
1
ADVANCE BY
0.5 LINE
PVBEGDELO PAL Vsync Begin Delay on Odd Field,
Address 0xE8[7]
When PVBEGDELO is 0 (default), there is no delay.
Setting PVBEGDELO to 1 delays Vsync going high on an odd
field by a line relative to PVBEG.
PVBEGDELE PAL Vsync Begin Delay on Even Field,
Address 0xE8[6]
When PVBEGDELE is 0, there is no delay.
Setting PVBEGDELE to 1 (default) delays Vsync going high on
an even field by a line relative to PVBEG.
PVBEGSIGN PAL Vsync Begin Sign, Address 0xE8[5]
Setting PVBEGSIGN to 0 delays the beginning of Vsync. Set for
user manual programming.
Setting PVBEGSIGN to 1 (default) advances the beginning of
Vsync. Not recommended for user programming.
PVBEG[4:0] PAL Vsync Begin, Address 0xE8[4:0]
The default value of PVBEG is 00101, indicating the PAL Vsync
begin position.
For all NTSC/PAL Vsync timing controls, both the V bit in the
AV code and the Vsync on the VS pin are modified.
VSYNC BEGIN
Figure 28. PAL Vsync Begin
Rev. B | Page 46 of 104
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