AN2077 View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
'AN2077' PDF : 19 Pages View PDF
EEPROM Emulation with STR71x
2 EEPROM EMULATION CONCEPT
2.1 PRINCIPLE
Different concepts are described in the literature. Each of them rely on partitioning a bank of
the Flash into several Data-sets and on using control bits (per Flash bank and per Data-set) to
compute which Flash bank and which Data-set is the valid one. For variable-length Data-sets,
linked data-list structures should be considered.
The method described in this document is based on fixed-length Data-sets and 2 Flash banks.
Figure 1. Bank partitioning for emulated EEPOM
STR71x Flash Bank-x
Data-set-n
STR71x Flash Bank-y
Data-set-m
Area for Data-set storage
Status bits for
Data-set-n
Area for status bit storage
(Data-set bits and
Flash bank bits)
Data-set-2
Data-set-1
Data-set-0
n
2 10
Data-set-2
Data-set-1
Data-set-0
m
2 10
Switch between each bank
(Erase one when using the other)
Variable update frequency
The variable update frequency may set high requirements on the program/erase cycle of the
Flash and on the Flash features (ex: Read-While-Write). Those features are analysed in detail
in the following pages.
5/19
Share Link: 
