AP87C54 View Datasheet(PDF) - Intel
Part Name
Description
MFG CO.
'AP87C54' PDF : 20 Pages View PDF
AUTOMOTIVE 87C54 87C54-20
AC TESTING INPUT OUTPUT WAVEFORMS
FLOAT WAVEFORMS
270849 – 17
AC Inputs during testing are driven at VCCb0 5V for a Logic ‘‘1’’
and 0 45V for a Logic ‘‘0’’ Timing measurements are made at VIH
min for a Logic ‘‘1’’ and VIL max for a Logic ‘‘0’’
270849 – 18
For timing purposes a port pin is no longer floating when a
100 mV change from load voltage occurs and begins to float
when a 100 mV change from the loaded VOH VOL level occurs
IOL IOH t g20 mA
EPROM CHARACTERISTICS
Table 3 shows the logic levels for programming the Program Memory the Encryption Table and the Lock Bits
and for reading the signature bytes
Mode
Program Code Data
Verify Code Data
Program Encryption
Array Address 0–3FH
Program Lock
Bits
Bit 1
Bit 2
Bit 3
Read Signature Byte
Table 3 EPROM Programming Modes
RST
H
PSEN
L
ALE
PROG
EA
VPP
12 75V
P2 6
L
P2 7
H
H
L
H
H
L
L
H
L
12 75V L
H
H
L
H
L
H
L
H
L
12 75V H
H
12 75V H
H
12 75V H
L
H
H
L
L
P3 3
H
L
H
H
H
H
L
P3 6
H
H
L
H
L
H
L
P3 7
H
H
H
H
L
L
L
DEFINITION OF TERMS
ADDRESS LINES P1 0–P1 7 P2 0–P2 5 respec-
tively for A0–A13
DATA LINES P0 0–P0 7 for D0–D7
CONTROL SIGNALS RST PSEN P2 6 P2 7 P3 3
P3 6 P3 7
PROGRAM SIGNALS ALE PROG EA VPP
PROGRAMMING THE EPROM
To be programmed the part must be running with a
4 MHz to 6 MHz oscillator (The reason the oscillator
needs to be running is that the internal bus is being
used to transfer address and program data to appro-
priate internal EPROM locations ) The address of an
EPROM location to be programmed is applied to
Port 1 and pins P2 0 – P2 5 of Port 2 while the code
byte to be programmed into that location is applied
to Port 0 The other Port 2 and 3 pins RST PSEN
and EA VPP should be held at the ‘‘Program’’ levels
indicated in Table 3 ALE PROG is pulsed low to
program the code byte into the addressed EPROM
location The setup is shown in Figure 11
14
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