APL3201 View Datasheet(PDF) - Anpec Electronics
Part Name
Description
MFG CO.
'APL3201' PDF : 16 Pages View PDF
APL3201
Electrical Characteristics (Cont.)
Refer to the typical application circuit. These specifications apply over VIN=5V, VBATT=4.2V, VTHRM=VREF/2, TJ= -40~125 °C, TA= -40~85°C,
unless otherwise specified. Typical values are at TA=25°C.
Symbol
Parameter
Test Conditions
SOFT-START AND REVSRSE CURRENT
TSS
Soft-Start Interval
BATT Input Current
BATT Shutdown Input Current
LOGIC INPUT/OUTPUTS
STAT1, STAT2 Logic-Low Output
STAT1, STAT2 Off-Leakage Current
EN Logic Input-High Level
EN Logic Input-Low Level
ICHG=0A to Fast-Charging
Current
VIN=0V, VBATT=4.2V
VEN=0V, VIN=5V,
VBATT=4.2V
Sinking 10mA
VSTAT1, 2=5V, VIN=0V
APL3201
Unit
Min.
Typ.
Max.
4
7
12
ms
-
-
8
µA
-
-
4
µA
-
-
0.4
V
-
-
1
µA
1.6
-
-
V
-
-
0.4
V
EN Input Bias Current
-
-
1
µA
Pin Description
PIN
NO.
NAME
1
VIN
2
STAT1
3
ISET
4
GND
5
EN
6
THRM
7
REF
8
STAT2
9
BYP
10
BATT
-
EP
FUNCTION
Input Supply Pin. Provides power to the charger, VIN can range from 4.35V to 6.0V and should be
bypassed with at least a 4.7µF capacitor.
Charge Status Output Pin 1. This pin is an active-high, open-drain output pin.
Charging Current Setting Pin. Connecting a resistor from this pin to GND set the fast-charge
current when the VIN is powering the charger.
Ground.
Charging Enable/Disable Control Pin. Drive EN high to begin charging, and EN low to stop
charging.
External Thermistor Connection Pin. THRM pauses charging when an externally connected
thermistor (10kΩ at +25°C) is at less than 0°C or greater than +50°C. Connecting this pin to GND
disables this function.
3V Reference Voltage Output Pin. Sources up to 500µA to bias the external thermistor. Bypass
with 0.1µF to GND. REF loading does not affect BATT regulation accuracy.
Charge Status Output Pin 2. This pin is an active-high, open-drain output pin.
Bias Supply Pin for Internal Circuitry. Bypass with a 2.2µF capacitor to GND.
Charger Output Pin. Connect this pin to the positive terminal of a Li+ battery.
Exposed Pad. Connect a large ground plane for maximum package heat dissipation. Connect
directly to GND under the IC.
Copyright © ANPEC Electronics Corp.
4
Rev. A.4 - Mar., 2009
www.anpec.com.tw
Share Link: 
