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APW7073A View Datasheet(PDF) - Anpec Electronics

Part Name
Description
MFG CO.
APW7073A
Anpec
Anpec Electronics Anpec
'APW7073A' PDF : 20 Pages View PDF
APW7073A
Application Information (Cont.)
MOSFET Selection (Cont.)
Note that both MOSFETs have conduction loss while the
upper MOSFET includes an additional transition loss.
The switching internal, tSW, is the function of the reverse
transfer capacitance CRSS. The (1+TC) term is to factor
in the temperature dependency of the RDS(ON) and can be
extracted from the “RDS(ON) vs Temperature” curve of the
power MOSFET.
PWM Compensation
The output LC filter of a step down converter introduces a
double pole, which contributes with -40dB/decade gain
slope and 180 degrees phase shift in the control loop. A
compensation network among COMP, FB, and VOUT
should be added. The compensation network is shown in
Figure 8. The output LC filter consists of the output induc-
tor and output capacitors. The transfer function of the LC
filter is given by:
FESR
=
1
2 × π × ESR × COUT
The FLC is the double poles of the LC filter, and FESR is the
zero introduced by the ESR of the output capacitor.
VPHASE
L
VOUT
COUT
ESR
Figure 5. The Output LC Filter
FLC
-40dB/dec
FESR
-20dB/dec
The PWM modulator is shown in Figure 7. The input is
the output of the error amplifier and the output is the
PHASE node. The transfer function of the PWM modula-
tor is given by:
GAINPWM
=
VIN
VOSC
VIN
ΔVOSC
OSC
PWM
Comparator
Driver
Output of
Error Amplifier
PHASE
Driver
Figure 7. The PWM Modulator
The compensation network is shown in Figure 8. It
provides a close loop transfer function with the highest
zero crossover frequency and sufficient phase margin.
The transfer function of error amplifier is given by:
1 //R2 + 1 
GAINAMP
=
VCOMP
VOUT
=
sC1
R1//R3 +
sC2
1 
sC3
=
R1+ R3
×

s
+
R2
1
×
C2

×

s
+
(R1+
1
R3)×
C3

R1× R3 × C1
s
s
+
C1+ C2
R2 × C1× C2

×

s
+
R3
1
× C3

The poles and zeros of the transfer function are:
FZ1
=
1
2 × π × R2 × C2
FZ2
=
2×
π×
1
(R1+
R3)× C3
FP1
=
1
2
×
π
×
R2
×

C1×
C1+
C2
C2

FP2
=
1
2 × π × R3 × C3
C1
R3 C3
R2 C2
Frequency(Hz)
Figure 6. The LC Filter GAIN and Frequency
VOUT
R1 FB
VREF
Figure 8. Compensation Network
VCOMP
Copyright © ANPEC Electronics Corp.
13
Rev. A.5 - Nov., 2012
www.anpec.com.tw
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