Concurrent Read While Write
AT29C432
Notes: 1. The Flash array may be read in between individual
byte loads to the E2PROM array as shown above.
This diagram only illustrates one read access be-
tween byte loads, but the host processor may con-
tinue reading the Flash array so long as tBLC is not
violated. This effectively allows the host the opportu-
nity to respond to system interrupts while operating
out of the Flash program memory, even in the mid-
dle of performing an E2PROM data update.
2. Flash read operations are also valid throughout the
E2PROM’s internal write cycle defined by tWCE.
3. Having both CEF and CEE active simultaneously is an
illegal state.
Chip Enable Delays
9