AT34C02C-TH-B View Datasheet(PDF) - Atmel Corporation

Part Name

Description

MFG CO.

AT34C02C-TH-B

Two-wire Serial EEPROM with Permanent and Reversible Software Write Protect

Atmel Corporation 

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AT34C02C

A page write is initiated the same as a byte write, but the microcontroller does not send a stop

condition after the first data word is clocked in. Instead, after the EEPROM acknowledges

receipt of the first data word, the microcontroller can transmit up to fifteen more data words. The

EEPROM will respond with a zero after each data word received. The microcontroller must ter-

minate the page write sequence with a stop condition (see Figure 1 on page 13).

The data word address lower four bits are internally incremented following the receipt of each

data word. The higher data word address bits are not incremented, retaining the memory page

row location. When the word address, internally generated, reaches the page boundary, the fol-

lowing byte is placed at the beginning of the same page. If more than sixteen data words are

transmitted to the EEPROM, the data word address will “roll over” and previous data will be

overwritten. The address “roll over” during write is from the last byte of the current page to the

first byte of the same page.

The device will acknowledge a write command, but not write the data, if the software or hard-

ware write protection has been enabled. The write cycle time must be observed even when the

write protection is enabled.

ACKNOWLEDGE POLLING: Once the internally-timed write cycle has started and the

EEPROM inputs are disabled, acknowledge polling can be initiated. This involves sending a

start condition followed by the device address word. The read/write bit is representative of the

operation desired. Only if the internal write cycle has completed will the EEPROM respond with

a zero allowing the read or write sequence to continue.

7. Write Protection

The software write protection, once enabled, write protects only the first-half of the array (00H -

7FH) while the hardware write protection, via the WP pin, is used to protect the entire array.

PERMANENT SOFTWARE WRITE PROTECTION: The software write protection is enabled by

sending a command, similar to a normal write command, to the device which programs the per-

manent write protect register. This must be done with the WP pin low. The write protect register

is programmed by sending a write command with the device address of 0110 instead of 1010

with the address and data bit being don’t cares (see Figure 7-1 on page 10). Once the software

write protection has been enabled, the device will no longer acknowledge the 0110 control byte.

The software write protection cannot be reversed even if the device is powered down. The write

cycle time must be observed.

REVERSIBLE SOFTWARE WRITE PROTECTION: The reversible software write protection is

enabled by sending a command, similar to a normal write command, to the device which pro-

grams the reversible write protect register. This must be done with the WP pin low. The write

protect register is programmed by sending a write command 01100010 with pins A2 and A1 tied

to ground or don't connect and pin A0 connected to VHV (see Figure 7-2). The reversible write

protection can be reversed by sending a command 01100110 with pin A2 tied to ground or no

connect, pin A1 tied to VCC and pin A0 tied to VHV (see Figure 7-3).

HARDWARE WRITE PROTECTION: The WP pin can be connected to VCC, GND, or left float-

ing. Connecting the WP pin to VCC will write protect the entire array, regardless of whether or not

the software write protection has been enabled. The software write protection register cannot be

programmed when the WP pin is connected to VCC. If the WP pin is connected to GND or left

floating, the write protection mode is determined by the status of the software write protect

register.

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5185D–SEEPR–1/08

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