AT45D32SSUB1D-CU View Datasheet(PDF) - Atmel Corporation
Part Name
Description
MFG CO.
'AT45D32SSUB1D-CU' PDF : 57 Pages View PDF
AT45DB321D
28. Revision History
Revision Level – Release Date
A – November 2005
B – January 2006
C – March 2006
D – April 2006
E – July 2006
F – August 2006
G – September 2006
H – February 2007
I – August 2007
J – April 2008
K – September 2008
History
Initial Release
Added 6 x 5 mm MLF (VDFN) package.
Added text, in “Programming the Configuration Register”, to indicate
that power cycling is required to switch to “power of 2” page size
after the opcode enable has been executed.
Corrected typographical error regarding the opcode for chip erase in
“Program and Erase Commands” table.
Added Preliminary.
Changed the sector size from 256K bytes to 64K bytes.
Added the “Legacy Commands” table.
Added 8 x 6 mm MLF (VDFN) package.
Changed the sector size of 0a and 0b to 8 pages and 120 pages
respectively.
Changed the Product Version Code to 00001.
Corrected typographical errors.
Added errata regarding Chip Erase.
Added AT45DB321D-SU to ordering information and corresponding
8S2 package.
Removed “not recommended for new designs” note from ordering
information for 8MW package.
Added AT45DB321D-CNU to ordering information and
corresponding 8CN3 package.
Removed “not recommended for new designs” comment from 8MW
package drawing.
Added additional text to “power of 2” binary page size option.
Changed tVSCL from 50 µs to 70 µs.
Changed tRDPD from 30 µs to 35 µs.
Changed tXFR and tCOMP values from 400 µs to 200 µs.
Removed AT45DB321D-CNU from ordering information and
corresponding 8CN3 package.
Added part number ordering code details for suffixes SL954/955.
Added ordering code details.
Corrected typographical errors in Sector Erase section.
Corrected A17+A16 from x (Don’t Care) to A for opcode 7Ch in
Table 15-6.
Corrected PA8+PA7 from x (Don’t Care) to P for opcode 7Ch in
Table 15-7.
55
3597N–DFLASH–04/09
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